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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-28 00:00:30 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-09-29 03:38:13 +0000 |
| commit | 32d47eb688390d08e0f3f839df69371b55af8889 (patch) | |
| tree | 5d00c058182b85e8baa39ee43d2d74731b5f0f56 /src/soc/intel/common/block/gspi | |
| parent | 44da9e201c58faf94ad22ec0fe18b693fd9d1239 (diff) | |
| download | coreboot-32d47eb688390d08e0f3f839df69371b55af8889.tar.gz coreboot-32d47eb688390d08e0f3f839df69371b55af8889.tar.bz2 coreboot-32d47eb688390d08e0f3f839df69371b55af8889.zip | |
soc/intel: Rename <intelblocks/chip.h>
The filename chip.h has a special purpose with the generation
of static devicetree, where the configuration structure name matches
the path to the chip.h file. For example, soc/intel/skylake/chip.h
defines struct soc_intel_skylake_config.
The renamed file did not follow this convention and the structure it
defines would conflict with one defined soc/intel/common/chip.h if such
is ever added.
Change-Id: Id3d56bf092c6111d2293136865b053b095e92d6b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35657
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/common/block/gspi')
| -rw-r--r-- | src/soc/intel/common/block/gspi/gspi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c index f937bd6eedfd..33f376ee7712 100644 --- a/src/soc/intel/common/block/gspi/gspi.c +++ b/src/soc/intel/common/block/gspi/gspi.c @@ -21,7 +21,7 @@ #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <intelblocks/chip.h> +#include <intelblocks/cfg.h> #include <intelblocks/gspi.h> #include <intelblocks/lpss.h> #include <intelblocks/spi.h> |