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| author | Duncan Laurie <dlaurie@google.com> | 2018-12-10 11:19:36 -0800 |
|---|---|---|
| committer | Duncan Laurie <dlaurie@chromium.org> | 2018-12-14 18:30:15 +0000 |
| commit | 28e8ae5385668bb7c26666c0a0bf0208231da78f (patch) | |
| tree | 32f7cc62c9eb2a867c266d1255a0debb21448a5e /src/soc/intel/common/block/include/intelblocks/gpio.h | |
| parent | 1c88cd6c2b70287589498686786038b774cdab61 (diff) | |
| download | coreboot-28e8ae5385668bb7c26666c0a0bf0208231da78f.tar.gz coreboot-28e8ae5385668bb7c26666c0a0bf0208231da78f.tar.bz2 coreboot-28e8ae5385668bb7c26666c0a0bf0208231da78f.zip | |
soc/intel/common: Add support for GPIO group pad base
In some situations the GPIO pad numbers used by the OS are not
contiguous and coreboot must provide a way for ACPI to provide
the expected GPIO number to the OS.
To do this each GPIO group can now have a pad base value, which
will be used as the starting pin number for this group and it
is added to the relative pin number of this GPIO to compute the
ACPI pin number for a particular GPIO.
By default this change has no effect because the existing uses
of INTEL_GPP() will set the pad base to PAD_BASE_NONE and the
GPIO number is used as the ACPI pin number without translation.
BUG=b:120686247
TEST=tested on a sarien(cannonlake) board
Change-Id: I25f73df45ffae18c5721a00ca230a6b07c250bab
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/30131
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks/gpio.h')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/gpio.h | 32 |
1 files changed, 28 insertions, 4 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio.h b/src/soc/intel/common/block/include/intelblocks/gpio.h index 4e26db361994..c389ec4531d5 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio.h @@ -23,13 +23,30 @@ #ifndef __ACPI__ #include <types.h> -#define INTEL_GPP(first_of_community, start_of_group, end_of_group) \ - { \ - .first_pad = (start_of_group) - (first_of_community), \ - .size = (end_of_group) - (start_of_group) + 1, \ +/* + * GPIO numbers may not be contiguous and instead will have a different + * starting pin number for each pad group. + */ +#define INTEL_GPP_BASE(first_of_community, start_of_group, end_of_group,\ + group_pad_base) \ + { \ + .first_pad = (start_of_group) - (first_of_community), \ + .size = (end_of_group) - (start_of_group) + 1, \ + .acpi_pad_base = (group_pad_base), \ } /* + * A pad base of -1 indicates that this group uses contiguous numbering + * and a pad base should not be used for this group. + */ +#define PAD_BASE_NONE -1 + +/* The common/default group numbering is contiguous */ +#define INTEL_GPP(first_of_community, start_of_group, end_of_group) \ + INTEL_GPP_BASE(first_of_community, start_of_group, end_of_group,\ + PAD_BASE_NONE) + +/* * Following should be defined in soc/gpio.h * GPIO_MISCCFG - offset to GPIO MISCCFG Register * @@ -67,6 +84,13 @@ struct pad_group { int first_pad; /* offset of first pad of the group relative to the community */ unsigned int size; /* Size of the group */ + /* + * This is the starting pin number for the pads in this group when + * they are used in ACPI. This is only needed if the pins are not + * contiguous across groups, most groups will have this set to + * PAD_BASE_NONE and use contiguous numbering for ACPI. + */ + int acpi_pad_base; }; /* This structure will be used to describe a community or each group within a |