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| author | Jeremy Soller <jeremy@system76.com> | 2021-08-10 14:06:51 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-08-19 13:51:59 +0000 |
| commit | 191a8d7d2e40b9c90d81cf8e5ea3fad414afeb29 (patch) | |
| tree | 02ba387688abd6b1ad7c313f3b35d904b3093a62 /src/soc/intel/common/block/p2sb/p2sb.c | |
| parent | d7df383342ee8f36783e1c8bf70c9a65225dd168 (diff) | |
| download | coreboot-191a8d7d2e40b9c90d81cf8e5ea3fad414afeb29.tar.gz coreboot-191a8d7d2e40b9c90d81cf8e5ea3fad414afeb29.tar.bz2 coreboot-191a8d7d2e40b9c90d81cf8e5ea3fad414afeb29.zip | |
soc/intel/common: Add TGL-H PCI IDs
Add TGL-H PCI IDs from the Processor and PCH EDS docs.
Reference:
- Intel doc 615985
- Intel doc 575683
Change-Id: I751d0d59aff9e93e2aa92546db78775bd1e6ef22
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56900
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/p2sb/p2sb.c')
| -rw-r--r-- | src/soc/intel/common/block/p2sb/p2sb.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 18c958e84d73..a9384aeb648b 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -189,6 +189,7 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_CMP_P2SB, PCI_DEVICE_ID_INTEL_CMP_H_P2SB, PCI_DEVICE_ID_INTEL_TGL_P2SB, + PCI_DEVICE_ID_INTEL_TGL_H_P2SB, PCI_DEVICE_ID_INTEL_EHL_P2SB, PCI_DEVICE_ID_INTEL_JSP_P2SB, PCI_DEVICE_ID_INTEL_ADP_P_P2SB, |