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author | Angel Pons <th3fanbus@gmail.com> | 2021-04-27 10:20:04 +0200 |
---|---|---|
committer | Nico Huber <nico.h@gmx.de> | 2021-04-28 14:13:20 +0000 |
commit | f530e363d106c2d5bc27aaba3ddbbdec18eeb3f6 (patch) | |
tree | 886c4d5c9da2ce755136a293db3296b23b02564b /src/soc/intel/common/block/pcie | |
parent | 0129393a6bac6974a2ca8222245ec5b6ca6af27d (diff) | |
download | coreboot-f530e363d106c2d5bc27aaba3ddbbdec18eeb3f6.tar.gz coreboot-f530e363d106c2d5bc27aaba3ddbbdec18eeb3f6.tar.bz2 coreboot-f530e363d106c2d5bc27aaba3ddbbdec18eeb3f6.zip |
soc/intel: Rename 200-series PCH device IDs
The code name for these PCHs is Union Point, abbreviated as `UPT`. There
are some 300-series Union Point PCHs (H310C, B365, Z370) which are meant
to be paired with Coffee Lake CPUs instead of Skylake or Kaby Lake CPUs,
and referring to them as `KBP` (Kaby Point, I guess) would be confusing.
Tested with BUILD_TIMELESS=1, HP 280 G2 remains identical.
Change-Id: I1a49115ae7ac37e76ce8d440910fb59926f34fac
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52700
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Timofey Komarov <happycorsair@yandex.ru>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/pcie')
-rw-r--r-- | src/soc/intel/common/block/pcie/pcie.c | 48 |
1 files changed, 24 insertions, 24 deletions
diff --git a/src/soc/intel/common/block/pcie/pcie.c b/src/soc/intel/common/block/pcie/pcie.c index f7f0902ab70a..55278117fe3b 100644 --- a/src/soc/intel/common/block/pcie/pcie.c +++ b/src/soc/intel/common/block/pcie/pcie.c @@ -138,30 +138,30 @@ static const unsigned short pcie_device_ids[] = { PCI_DEVICE_ID_INTEL_LWB_PCIE_RP18_SUPER, PCI_DEVICE_ID_INTEL_LWB_PCIE_RP19_SUPER, PCI_DEVICE_ID_INTEL_LWB_PCIE_RP20_SUPER, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP1, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP2, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP3, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP4, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP5, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP6, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP7, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP8, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP9, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP10, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP11, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP12, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP13, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP14, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP15, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP16, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP17, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP18, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP19, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP20, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP21, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP22, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP23, - PCI_DEVICE_ID_INTEL_KBP_H_PCIE_RP24, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP1, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP2, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP3, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP4, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP5, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP6, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP7, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP8, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP9, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP10, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP11, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP12, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP13, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP14, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP15, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP16, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP17, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP18, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP19, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP20, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP21, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP22, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP23, + PCI_DEVICE_ID_INTEL_UPT_H_PCIE_RP24, PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP1, PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP2, PCI_DEVICE_ID_INTEL_CNL_LP_PCIE_RP3, |