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| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 16:01:39 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-04 22:44:06 +0000 |
| commit | d1c590a66654bdb6be6da85c539c9567be6234a0 (patch) | |
| tree | bee2eebeb8bb5d926c3d4e1402b322e95bd4f0cf /src/soc/intel/common/block/spi/spi.c | |
| parent | 4bc8dfb8207ae13140b3e5b01d3f3e36d66143d6 (diff) | |
| download | coreboot-d1c590a66654bdb6be6da85c539c9567be6234a0.tar.gz coreboot-d1c590a66654bdb6be6da85c539c9567be6234a0.tar.bz2 coreboot-d1c590a66654bdb6be6da85c539c9567be6234a0.zip | |
nb/intel/x4x: Define and use `HOST_BRIDGE` macro
Other Intel northbridges do this.
Tested with BUILD_TIMELESS=1, Asus P5QL PRO does not change
Change-Id: I50785b7bf3e3cc0eade7fda4b4b2e2bb71a54c31
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44143
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/common/block/spi/spi.c')
0 files changed, 0 insertions, 0 deletions