diff options
author | Lean Sheng Tan <lean.sheng.tan@intel.com> | 2019-05-27 13:06:35 +0800 |
---|---|---|
committer | Philipp Deppenwiese <zaolin.daisuki@gmail.com> | 2019-07-17 14:28:41 +0000 |
commit | 38c3ff7b6ef2875b789d9621363db9165b9a1078 (patch) | |
tree | f13e8f98cac2ae0e260e2100c94d4f60d1420109 /src/soc/intel/common/block/spi | |
parent | f2ac0137566076262152f74b6b6761c9f6f2def2 (diff) | |
download | coreboot-38c3ff7b6ef2875b789d9621363db9165b9a1078.tar.gz coreboot-38c3ff7b6ef2875b789d9621363db9165b9a1078.tar.bz2 coreboot-38c3ff7b6ef2875b789d9621363db9165b9a1078.zip |
soc/intel/cannonlake: Add device Ids for new CFL SKUs support
- Add CPU, MCH & IGD IDs for new Coffeelake SKUs
- Add PCH, LPC, SPI IDs for CNP-H PCH CM246 & C246
- Make some minor alignments & naming corrections to align with the rest
TEST= build, boot to both Linux & windows OS on CFL H & S platforms
and verified all the device Id's in serial console logs.
Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I343b11ea8d9c33eb189d7478511a473b145f4ab4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34157
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Boon Tiong Teo <boon.tiong.teo@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/common/block/spi')
-rw-r--r-- | src/soc/intel/common/block/spi/spi.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c index 85db5cfa4a1c..af5087f71658 100644 --- a/src/soc/intel/common/block/spi/spi.c +++ b/src/soc/intel/common/block/spi/spi.c @@ -67,6 +67,10 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_CNL_SPI1, PCI_DEVICE_ID_INTEL_CNL_SPI2, PCI_DEVICE_ID_INTEL_CNL_HWSEQ_SPI, + PCI_DEVICE_ID_INTEL_CNP_H_SPI0, + PCI_DEVICE_ID_INTEL_CNP_H_SPI1, + PCI_DEVICE_ID_INTEL_CNP_H_SPI2, + PCI_DEVICE_ID_INTEL_CNP_H_HWSEQ_SPI, PCI_DEVICE_ID_INTEL_ICP_SPI0, PCI_DEVICE_ID_INTEL_ICP_SPI1, PCI_DEVICE_ID_INTEL_ICP_SPI2, |