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| author | Nico Huber <nico.h@gmx.de> | 2022-08-06 19:11:55 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-15 13:07:11 +0000 |
| commit | 576861994ea5011c3a836a826b8189ef79c366cb (patch) | |
| tree | 1d5dc30e477587ce2188d1472804322929659dcf /src/soc/intel/common/block/uart/uart.c | |
| parent | c0fc38eed8f407d71f714f4d6fe2af0c3501ece4 (diff) | |
| download | coreboot-576861994ea5011c3a836a826b8189ef79c366cb.tar.gz coreboot-576861994ea5011c3a836a826b8189ef79c366cb.tar.bz2 coreboot-576861994ea5011c3a836a826b8189ef79c366cb.zip | |
soc/intel/skylake: Assign device ops in chipset devicetree
Some PCI IDs were missing, and at least one (SPT's fast SPI
device in a generic SPI driver) was wrong. Hence, this patch
actually changes behavior depending on the devices actually
present in a machine.
In this patch the Skylake devicetree is written in a single-line
style. Alternative, the device operations could be put on a separate
line, e.g.
device pci 00.0 alias system_agent on
ops systemagent_ops
end
Tested on Kontron/bSL6. Notable in the log diff is that the
CSE and SATA drivers are hooked up now.
Change-Id: I8635fc53ca617b029d6fe1845eaef6c5c749db82
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66485
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/common/block/uart/uart.c')
| -rw-r--r-- | src/soc/intel/common/block/uart/uart.c | 15 |
1 files changed, 3 insertions, 12 deletions
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 3e2e6975c4db..b881c58127a3 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -337,7 +337,7 @@ static const char *uart_acpi_name(const struct device *dev) } } -static struct device_operations device_ops = { +struct device_operations uart_ops = { .read_resources = uart_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = uart_common_enable_resources, @@ -351,15 +351,6 @@ static const unsigned short pci_device_ids[] = { PCI_DID_INTEL_MTL_UART0, PCI_DID_INTEL_MTL_UART1, PCI_DID_INTEL_MTL_UART2, - PCI_DID_INTEL_SPT_UART0, - PCI_DID_INTEL_SPT_UART1, - PCI_DID_INTEL_SPT_UART2, - PCI_DID_INTEL_SPT_H_UART0, - PCI_DID_INTEL_SPT_H_UART1, - PCI_DID_INTEL_SPT_H_UART2, - PCI_DID_INTEL_UPT_H_UART0, - PCI_DID_INTEL_UPT_H_UART1, - PCI_DID_INTEL_UPT_H_UART2, PCI_DID_INTEL_APL_UART0, PCI_DID_INTEL_APL_UART1, PCI_DID_INTEL_APL_UART2, @@ -418,7 +409,7 @@ static const unsigned short pci_device_ids[] = { }; static const struct pci_driver pch_uart __pci_driver = { - .ops = &device_ops, + .ops = &uart_ops, .vendor = PCI_VID_INTEL, .devices = pci_device_ids, }; @@ -426,7 +417,7 @@ static const struct pci_driver pch_uart __pci_driver = { static void uart_enable(struct device *dev) { struct soc_intel_common_block_uart_config *conf = dev->chip_info; - dev->ops = &device_ops; + dev->ops = &uart_ops; dev->device = conf ? conf->devid : 0; } |