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| author | Nico Huber <nico.h@gmx.de> | 2019-05-29 23:18:26 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-06-03 13:23:55 +0000 |
| commit | 8bbad6c8186037e67da9f1465078b5952c0c0899 (patch) | |
| tree | 42900c6379e218dd2cbfc39bb3a6fe181f6a9501 /src/soc/intel/common/block/uart/uart.c | |
| parent | 51dc5ea735cd175a6d38d59d8b3b3eadee027e6c (diff) | |
| download | coreboot-8bbad6c8186037e67da9f1465078b5952c0c0899.tar.gz coreboot-8bbad6c8186037e67da9f1465078b5952c0c0899.tar.bz2 coreboot-8bbad6c8186037e67da9f1465078b5952c0c0899.zip | |
soc/intel/common/uart: Drop dead call to soc_uart_set_legacy_mode()
The only path that leads here is guarded by both !DRIVERS_UART_
8250MEM_32 and INTEL_LPSS_UART_FOR_CONSOLE but the latter selects
the former.
Change-Id: I6e0765b028572950991c45b45b2051f4f176a94a
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao <lance.zhao@gmail.com>
Diffstat (limited to 'src/soc/intel/common/block/uart/uart.c')
| -rw-r--r-- | src/soc/intel/common/block/uart/uart.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index a8e5792a860d..35c2c6cafb04 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -139,10 +139,6 @@ void uart_bootblock_init(void) uart_common_init(uart_get_device(), UART_BASE(CONFIG_UART_FOR_CONSOLE)); - if (!CONFIG(DRIVERS_UART_8250MEM_32)) - /* Put UART in byte access mode for 16550 compatibility */ - soc_uart_set_legacy_mode(); - /* Configure the 2 pads per UART. */ uart_configure_gpio_pads(); } |