Revert "soc/intel/common: Set controller state to active in uart init"

This reverts commit 46445155ea21b0aa9106e12a00b9b1d89887a461.

Reason for revert: Breaks coreboot. Either no UART working or the
complete boot process stops.

Platform: Intel Apollolake, tested on Up Squared

Change-Id: If581f42e423caa76deb4ecf67296a7c2f1f7705d
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

1 files changed, 3 insertions, 6 deletions

diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index 82e5df401c31..9d820ffd7ef2 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -33,11 +33,8 @@
 extern const struct uart_gpio_pad_config uart_gpio_pads[];
 extern const int uart_max_index;
 
-static void uart_lpss_init(struct device *dev, uintptr_t baseaddr)
+static void uart_lpss_init(uintptr_t baseaddr)
 {
-	 /* Ensure controller is in D0 state */
-	lpss_set_power_state(dev, STATE_D0);
-
 	/* Take UART out of reset */
 	lpss_reset_release(baseaddr);
 
@@ -84,7 +81,7 @@ void uart_common_init(struct device *device, uintptr_t baseaddr)
 	/* Enable memory access and bus master */
 	pci_write_config32(dev, PCI_COMMAND, UART_PCI_ENABLE);
 
-	uart_lpss_init(device, baseaddr);
+	uart_lpss_init(baseaddr);
 }
 
 struct device *uart_get_device(void)
@@ -227,7 +224,7 @@ static void uart_common_enable_resources(struct device *dev)
 
 		base = pci_read_config32(dev, PCI_BASE_ADDRESS_0) & ~0xFFF;
 		if (base)
-			uart_lpss_init(dev, base);
+			uart_lpss_init(base);
 	}
 }