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| author | Usha P <usha.p@intel.com> | 2022-01-17 20:24:31 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-11 23:55:20 +0000 |
| commit | af5a9d64a565d76dc472d1bb16e4adaa423ca0b5 (patch) | |
| tree | 18fe763728b565713c33e037a40bad1cf0ebb5e1 /src/soc/intel/common/block/uart/uart.c | |
| parent | 6f0b5b3e6bc84dcf2edcc3f6af460af934de5e7f (diff) | |
| download | coreboot-af5a9d64a565d76dc472d1bb16e4adaa423ca0b5.tar.gz coreboot-af5a9d64a565d76dc472d1bb16e4adaa423ca0b5.tar.bz2 coreboot-af5a9d64a565d76dc472d1bb16e4adaa423ca0b5.zip | |
soc/intel/common: Re-use Alder Lake-M device IDs for Alder Lake-N
Few of the Alder Lake-N Device IDs according to EDS, are named as ADL_M
IDs in the current code. Hence rename those device IDs as ADL_M_N and
use them for Alder Lake-N platform.
Document Number: 619501, 645548
Signed-off-by: Usha P <usha.p@intel.com>
Change-Id: I6042017c6189cbc3ca9dce0e50acfb68ea4003f1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61162
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/soc/intel/common/block/uart/uart.c')
| -rw-r--r-- | src/soc/intel/common/block/uart/uart.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 44bfd6749802..2e70d05ba30c 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -403,10 +403,10 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_ADP_P_UART4, PCI_DEVICE_ID_INTEL_ADP_P_UART5, PCI_DEVICE_ID_INTEL_ADP_P_UART6, - PCI_DEVICE_ID_INTEL_ADP_M_UART0, - PCI_DEVICE_ID_INTEL_ADP_M_UART1, - PCI_DEVICE_ID_INTEL_ADP_M_UART2, - PCI_DEVICE_ID_INTEL_ADP_M_UART3, + PCI_DEVICE_ID_INTEL_ADP_M_N_UART0, + PCI_DEVICE_ID_INTEL_ADP_M_N_UART1, + PCI_DEVICE_ID_INTEL_ADP_M_N_UART2, + PCI_DEVICE_ID_INTEL_ADP_M_N_UART3, 0, }; |