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author | Arthur Heymans <arthur@aheymans.xyz> | 2023-08-24 15:12:19 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-31 10:36:39 +0000 |
commit | 7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8 (patch) | |
tree | 1bddf10cecf4577fee207e0dbc6f7a5c1b10af13 /src/soc/intel/common/block/xhci/xhci.c | |
parent | 3138faa7cf1b91e0b56ad0b1be6260cf4251a284 (diff) | |
download | coreboot-7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8.tar.gz coreboot-7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8.tar.bz2 coreboot-7fcd4d58ec7ea2da31c258ba9d8601f086d7f8d8.zip |
device/device.h: Rename busses for clarity
This renames bus to upstream and link_list to downstream.
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/intel/common/block/xhci/xhci.c')
-rw-r--r-- | src/soc/intel/common/block/xhci/xhci.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index ff6fbf095791..03ed578e2735 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -92,8 +92,8 @@ void usb_xhci_disable_unused(bool (*ext_usb_xhci_en_cb)(unsigned int port_type, return; } - while ((hub = dev_bus_each_child(xhci->link_list, hub)) != NULL) { - while ((port = dev_bus_each_child(hub->link_list, port)) != NULL) { + while ((hub = dev_bus_each_child(xhci->downstream, hub)) != NULL) { + while ((port = dev_bus_each_child(hub->downstream, port)) != NULL) { enable = true; config = config_of(port); if (config->type == UPC_TYPE_INTERNAL) { |