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| author | Lijian Zhao <lijian.zhao@intel.com> | 2017-07-29 16:38:38 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-08-04 14:24:49 +0000 |
| commit | bbedef9cfaa23356c79b1318da799450f39ca8e7 (patch) | |
| tree | 770bcb6b5fec4c07aeb9ad6ec9e9570e4a2dbd09 /src/soc/intel/common/block/xhci/xhci.c | |
| parent | 241bd40966e1cdddd05a159746c4ab8dc3438534 (diff) | |
| download | coreboot-bbedef9cfaa23356c79b1318da799450f39ca8e7.tar.gz coreboot-bbedef9cfaa23356c79b1318da799450f39ca8e7.tar.bz2 coreboot-bbedef9cfaa23356c79b1318da799450f39ca8e7.zip | |
soc/intel/common: Add Cannonlake pci ids for common
Add Cannonlake pci device ids for all the merged intel common code. As
of now only have CNL-U and CNL-Y pci ids.
Change-Id: Iee5087cdeba53919d83ff665d0c417075279294c
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/20823
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/common/block/xhci/xhci.c')
| -rw-r--r-- | src/soc/intel/common/block/xhci/xhci.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index 50fe1de69c14..ac7bd580cb84 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -31,6 +31,7 @@ static struct device_operations usb_xhci_ops = { static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_APL_XHCI, + PCI_DEVICE_ID_INTEL_CNL_LP_XHCI, PCI_DEVICE_ID_INTEL_GLK_XHCI, PCI_DEVICE_ID_INTEL_SPT_LP_XHCI, PCI_DEVICE_ID_INTEL_KBP_H_XHCI, |