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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-07-09 10:21:49 -0600 |
|---|---|---|
| committer | Werner Zeh <werner.zeh@siemens.com> | 2021-07-12 04:34:14 +0000 |
| commit | 251d40596ca6b5c33ed055b0ae81835d7a6c0a4c (patch) | |
| tree | d18b18c89093eb08d59754602e1ef4719a6e3b65 /src/soc/intel/common | |
| parent | 9d4fda857929d286fa5a367d0ca6611e2949aa12 (diff) | |
| download | coreboot-251d40596ca6b5c33ed055b0ae81835d7a6c0a4c.tar.gz coreboot-251d40596ca6b5c33ed055b0ae81835d7a6c0a4c.tar.bz2 coreboot-251d40596ca6b5c33ed055b0ae81835d7a6c0a4c.zip | |
soc/intel/common/irq: Program IRQ pin in irq_program_non_pch()
Previously, irq_program_non_pch() was only programming the IRQ line, but
the pin is required as well.
BUG=b:176858827
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I2a2823c183a3495721a912de285cddb4a9444c55
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56174
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/irq/irq.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/src/soc/intel/common/block/irq/irq.c b/src/soc/intel/common/block/irq/irq.c index f0892a988c74..00aff627a81a 100644 --- a/src/soc/intel/common/block/irq/irq.c +++ b/src/soc/intel/common/block/irq/irq.c @@ -418,10 +418,12 @@ bool irq_program_non_pch(void) continue; } - if (entry->irq) - pci_s_write_config8(PCI_DEV(0, PCI_SLOT(entry->devfn), - PCI_FUNC(entry->devfn)), - PCI_INTERRUPT_LINE, entry->irq); + if (entry->irq) { + pci_devfn_t dev = PCI_DEV(0, PCI_SLOT(entry->devfn), + PCI_FUNC(entry->devfn)); + pci_s_write_config8(dev, PCI_INTERRUPT_LINE, entry->irq); + pci_s_write_config8(dev, PCI_INTERRUPT_PIN, (uint8_t)entry->pin); + } entry = entry->next; } |