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| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2021-06-07 23:38:17 +0530 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-06-08 15:43:08 +0000 |
| commit | 3102fd0f8f1d70d5e25997f15374ff5e2b39957c (patch) | |
| tree | 0caba8be8078989131c3ed40fb93bcaf6fdbf263 /src/soc/intel/common | |
| parent | c07d2e5a9b8d9e5c9db183ae243b4a92dba67d95 (diff) | |
| download | coreboot-3102fd0f8f1d70d5e25997f15374ff5e2b39957c.tar.gz coreboot-3102fd0f8f1d70d5e25997f15374ff5e2b39957c.tar.bz2 coreboot-3102fd0f8f1d70d5e25997f15374ff5e2b39957c.zip | |
soc/intel: Add Alder Lake's GT device ID
Add Alder Lake specific graphics device ID. The document# 641765 lists
the id 0x46a8.
TEST=Verify boot on brya
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: I6f36256505a3e07c6197079ea2013991e841401b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55256
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/graphics/graphics.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 80f13c629161..cbeffce2ce54 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -299,6 +299,7 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_ADL_P_GT2_1, PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, + PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, PCI_DEVICE_ID_INTEL_ADL_S_GT1, PCI_DEVICE_ID_INTEL_ADL_M_GT1, 0, |