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authorArthur Heymans <arthur@aheymans.xyz>2019-02-05 21:10:01 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-05-29 20:24:13 +0000
commit62c0b61bed96df60967d2980d9ee4e4b3f0461b0 (patch)
tree61f8df6e0138e20b2a56e7a28fef2e357fe34c78 /src/soc/intel/denverton_ns/bootblock/bootblock.c
parent543be8d367468253096311fe9198bb8cc66ad5b4 (diff)
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soc/intel/denverton_ns: Don't use CONFIG_CBFS_SIZE
CONFIG_CBFS_SIZE is only meaningful to generate the default fmap layout and ought not to be used in the code directly. Change-Id: Iae72a9fb02d62d7548d34689f5eb371f34cd3d81 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31249 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: David Guckian Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/denverton_ns/bootblock/bootblock.c')
-rw-r--r--src/soc/intel/denverton_ns/bootblock/bootblock.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/denverton_ns/bootblock/bootblock.c b/src/soc/intel/denverton_ns/bootblock/bootblock.c
index f16ee20620f2..57e3a2e49bf0 100644
--- a/src/soc/intel/denverton_ns/bootblock/bootblock.c
+++ b/src/soc/intel/denverton_ns/bootblock/bootblock.c
@@ -37,8 +37,8 @@ const FSPT_UPD temp_ram_init_params = {
.MicrocodeRegionLength =
(UINT32)CONFIG_CPU_MICROCODE_CBFS_LEN,
.CodeRegionBase =
- (UINT32)(0x100000000ULL - CONFIG_CBFS_SIZE),
- .CodeRegionLength = (UINT32)CONFIG_CBFS_SIZE,
+ (UINT32)(0x100000000ULL - CONFIG_ROM_SIZE),
+ .CodeRegionLength = (UINT32)CONFIG_ROM_SIZE,
.Reserved1 = {0},
},
.FsptConfig = {