soc/intel/elkhartlake: Fix EHL mainboard build fail errors

When EHL initial mainboard patch is uploaded, there are some build
errors caused by EHL soc codes. Here are the fixes:
1. include gpio_op.asl to resolve undefined variables in scs.asl
2. remove unused variables in fsp_params.c
3. rearrage sequences of #includes to fix build dependency of
   soc/gpio_defs.h in intelblocks/gpio.h
4. add the __weak to mainboard_memory_init_params function
5. add the missing _len as per this patch changes
   https://review.coreboot.org/c/coreboot/+/45873

Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: Idaa8b0b5301742287665abde065ad72965bc62b3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47804
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 1 insertions, 1 deletions

diff --git a/src/soc/intel/elkhartlake/include/soc/gpio.h b/src/soc/intel/elkhartlake/include/soc/gpio.h
index 6cca74261476..367df8227620 100644
--- a/src/soc/intel/elkhartlake/include/soc/gpio.h
+++ b/src/soc/intel/elkhartlake/include/soc/gpio.h
@@ -3,8 +3,8 @@
 #ifndef _SOC_ELKHARTLAKE_GPIO_H_
 #define _SOC_ELKHARTLAKE_GPIO_H_
 
-#include <intelblocks/gpio.h>
 #include <soc/gpio_defs.h>
+#include <intelblocks/gpio.h>
 
 #define CROS_GPIO_NAME		"INT34C8"
 #define CROS_GPIO_COMM0_NAME    "INT34C8:00"