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| author | Subrata Banik <subratabanik@google.com> | 2022-01-03 18:49:35 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-21 16:02:34 +0000 |
| commit | 6fb126773f538ea4467b1abfde6cb8c6fc3cc9bb (patch) | |
| tree | c99ad2d7009db445105a60b672849c42eba21fa7 /src/soc/intel/elkhartlake | |
| parent | cef6770a0bf0cbe06a044ada7a28812cbd22afe8 (diff) | |
| download | coreboot-6fb126773f538ea4467b1abfde6cb8c6fc3cc9bb.tar.gz coreboot-6fb126773f538ea4467b1abfde6cb8c6fc3cc9bb.tar.bz2 coreboot-6fb126773f538ea4467b1abfde6cb8c6fc3cc9bb.zip | |
soc/intel/ehl: Replace dt `HeciEnabled` by `HECI1 disable` config
The only option to make HECI1 function disable on Elkhart Lake SoC
platform is using SBI under SMM mode.
List of changes:
1. Drop `HeciEnabled` from dt and dt chip configuration.
2. Replace all logic that disables HECI1 based on the `HeciEnabled`
chip config with `DISABLE_HECI1_AT_PRE_BOOT` config.
Mainboards that choose to make HECI1 enable during boot don't override
`heci1 disable` config.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I76c625e6221fdef1343599e7dbc7739caa91bf98
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60727
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sheng Lean Tan <sheng.tan@9elements.com>
Diffstat (limited to 'src/soc/intel/elkhartlake')
| -rw-r--r-- | src/soc/intel/elkhartlake/chip.h | 4 | ||||
| -rw-r--r-- | src/soc/intel/elkhartlake/smihandler.c | 6 |
2 files changed, 1 insertions, 9 deletions
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h index e18e52db945a..210e92c4b6f8 100644 --- a/src/soc/intel/elkhartlake/chip.h +++ b/src/soc/intel/elkhartlake/chip.h @@ -226,10 +226,6 @@ struct soc_intel_elkhartlake_config { uint8_t Device4Enable; - /* HeciEnabled decides the state of Heci1 at end of boot - * Setting to 0 (default) disables Heci1 and hides the device from OS */ - uint8_t HeciEnabled; - /* Enable/Disable EIST. 1b:Enabled, 0b:Disabled */ uint8_t eist_enable; diff --git a/src/soc/intel/elkhartlake/smihandler.c b/src/soc/intel/elkhartlake/smihandler.c index 6637847e17dd..e3c5012a5fe4 100644 --- a/src/soc/intel/elkhartlake/smihandler.c +++ b/src/soc/intel/elkhartlake/smihandler.c @@ -16,11 +16,7 @@ */ void smihandler_soc_at_finalize(void) { - const struct soc_intel_elkhartlake_config *config; - - config = config_of_soc(); - - if (!config->HeciEnabled && CONFIG(HECI_DISABLE_USING_SMM)) + if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT)) heci_disable(); } |