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| author | Paul Menzel <pmenzel@molgen.mpg.de> | 2018-05-05 22:17:09 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2018-05-08 14:23:48 +0000 |
| commit | 3e582d1613c9df08b0a0a745cd720bd397b0cf49 (patch) | |
| tree | 5e12024532f426e12240e5569b6ed857a7c968b1 /src/soc/intel/fsp_broadwell_de/romstage | |
| parent | 47503cd688f6e5f092fccd4be9293ff84dd6ae4b (diff) | |
| download | coreboot-3e582d1613c9df08b0a0a745cd720bd397b0cf49.tar.gz coreboot-3e582d1613c9df08b0a0a745cd720bd397b0cf49.tar.bz2 coreboot-3e582d1613c9df08b0a0a745cd720bd397b0cf49.zip | |
soc/intel/fsp_broadwell_de: Spell verb *set up* with space
Change-Id: If2e66f3531696d430b3ae133c4b7ec0d929713b7
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/26129
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel/fsp_broadwell_de/romstage')
| -rw-r--r-- | src/soc/intel/fsp_broadwell_de/romstage/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c index d5d0a96b565e..0f53a79732a4 100644 --- a/src/soc/intel/fsp_broadwell_de/romstage/romstage.c +++ b/src/soc/intel/fsp_broadwell_de/romstage/romstage.c @@ -89,7 +89,7 @@ void *asmlinkage main(FSP_INFO_HEADER *fsp_info_header) /******************************************************************************* * The FSP early_init function returns to this function. - * Memory is setup and the stack is set by the FSP. + * Memory is set up and the stack is set by the FSP. */ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) { |