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| author | Michael Niewöhner <foss@mniewoehner.de> | 2020-12-11 22:13:44 +0100 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-12-30 00:30:04 +0000 |
| commit | 8913b783b9d3ffea2eda7cfd1c9e7319ae889246 (patch) | |
| tree | df102d125f0465a007689df4e07e6772b53723c3 /src/soc/intel/icelake/chip.h | |
| parent | 979a071b0e3b5a3e578a25f1553a3a32f618d4b2 (diff) | |
| download | coreboot-8913b783b9d3ffea2eda7cfd1c9e7319ae889246.tar.gz coreboot-8913b783b9d3ffea2eda7cfd1c9e7319ae889246.tar.bz2 coreboot-8913b783b9d3ffea2eda7cfd1c9e7319ae889246.zip | |
soc/intel: hook up new gpio device in the soc chips
This change adds the required gpio operations struct to soc/common gpio
code and hooks them up in all socs currently using the gpio block code,
except DNV-NS, which is handled in a separate change.
Also, add the gpio device to existing chipset devicetrees.
Successfully tested on Supermicro X11SSM-F with CB:48097, X11SSH-TF with
CB:48711 and OCP DeltaLake with CB:48672.
Change-Id: I81dbbf5397b28ffa7537465c53332779245b39f6
Tested-by: Johnny Lin <Johnny_Lin@wiwynn.com>
Tested-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: Patrick Rudolph <siro@das-labor.org>
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48583
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/icelake/chip.h')
| -rw-r--r-- | src/soc/intel/icelake/chip.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/icelake/chip.h b/src/soc/intel/icelake/chip.h index cd0a9b03d8d8..64bc70ba5390 100644 --- a/src/soc/intel/icelake/chip.h +++ b/src/soc/intel/icelake/chip.h @@ -9,6 +9,7 @@ #include <intelblocks/gspi.h> #include <stdint.h> #include <soc/gpe.h> +#include <soc/gpio.h> #include <soc/pch.h> #include <soc/gpio_defs.h> #include <soc/pci_devs.h> |