soc/intel: move disabling of PM Timer to SoC PMC code

Move disabling of PM Timer to SoC PMC code.

The original reason for placing that in `finalize` [1] was FSP hanging
due to use of the PM timer without enabling timer emulation first in
coreboot, which was added later [2].

[1] commit 6c1bf27dae (intel/skylake: disable ACPI PM Timer to enable
    XTAL OSC shutdown)

[2] commit f004f66ca7 (soc/intel/skylake: Enable ACPI PM timer emulation
    on all CPUs)

Change-Id: I354c3aea0c8c1f8ff3d698e0636932b7b76125f7
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58019
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 9 insertions, 0 deletions

diff --git a/src/soc/intel/jasperlake/pmc.c b/src/soc/intel/jasperlake/pmc.c
index a9fc52577951..d3607dcb57a6 100644
--- a/src/soc/intel/jasperlake/pmc.c
+++ b/src/soc/intel/jasperlake/pmc.c
@@ -92,6 +92,15 @@ static void soc_pmc_init(struct device *dev)
 	 * done from the "ops->init" callback.
 	 */
 	pmc_set_acpi_mode();
+
+	/*
+	 * Disable ACPI PM timer based on Kconfig
+	 *
+	 * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
+	 * Disabling ACPI PM timer also switches off TCO
+	 */
+	if (!CONFIG(USE_PM_ACPI_TIMER))
+		pmc_disable_acpi_timer();
 }
 
 static void pm1_enable_pwrbtn_smi(void *unused)