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| author | Subrata Banik <subratabanik@google.com> | 2022-07-21 12:51:50 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-25 21:15:04 +0000 |
| commit | 15faf7ea6a12e5cd84afbe01cefd130f3af983c7 (patch) | |
| tree | 4b6b8db8ed0d45581d536e011869b04731fff4eb /src/soc/intel/meteorlake | |
| parent | 8795c42d29850d4785a7d3d0b69e0b648f7fb239 (diff) | |
| download | coreboot-15faf7ea6a12e5cd84afbe01cefd130f3af983c7.tar.gz coreboot-15faf7ea6a12e5cd84afbe01cefd130f3af983c7.tar.bz2 coreboot-15faf7ea6a12e5cd84afbe01cefd130f3af983c7.zip | |
Revert "soc/intel/meteorlake: Align TCSS functions through SBI"
This reverts commit b57d172fbb5265d632c031532fcc2aec156e065a.
Reason for revert: Results into hard hang with serial debug msg as
below:
`[EMERG] Unable to unhide the P2SB device!`
Intel team is working towards to fix this issue.
BUG=b:239806774
TEST=Able to boot the Intel/MTLRVP with this revert.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ic6be37c000afdf4f0c6c22497c233aa0bbc49d48
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65500
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/meteorlake')
| -rw-r--r-- | src/soc/intel/meteorlake/tcss.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/meteorlake/tcss.c b/src/soc/intel/meteorlake/tcss.c index ed4941106c5f..c51fe6c41f44 100644 --- a/src/soc/intel/meteorlake/tcss.c +++ b/src/soc/intel/meteorlake/tcss.c @@ -3,6 +3,6 @@ #include <intelblocks/tcss.h> const struct soc_tcss_ops tcss_ops = { - .configure_aux_bias_pads = ioe_tcss_configure_aux_bias_pads_sbi, - .valid_tbt_auth = ioe_tcss_valid_tbt_auth, + .configure_aux_bias_pads = tcss_configure_aux_bias_pads_regbar, + .valid_tbt_auth = tcss_valid_tbt_auth, }; |