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| author | Subrata Banik <subratabanik@google.com> | 2022-07-06 07:07:26 +0000 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-07 13:07:47 +0000 |
| commit | a33bcb97fe8c9aeb7d3dcde7959bc40b98ddb03e (patch) | |
| tree | 3f77623b4dc3ac7b1986a30e36bc3e6ecf4c79b1 /src/soc/intel/meteorlake | |
| parent | d624e74f7b91198f06ab1cebf586be2a094c7d35 (diff) | |
| download | coreboot-a33bcb97fe8c9aeb7d3dcde7959bc40b98ddb03e.tar.gz coreboot-a33bcb97fe8c9aeb7d3dcde7959bc40b98ddb03e.tar.bz2 coreboot-a33bcb97fe8c9aeb7d3dcde7959bc40b98ddb03e.zip | |
soc/intel/meteorlake: Remove `ADL` instances
This patch removes all instances of the `ADL` from Meteor Lake SoC
directory.
TEST=Able to build and boot Google/Rex.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I8153b2070467beb582ce1f70be97272ce09ca04c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65667
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/meteorlake')
| -rw-r--r-- | src/soc/intel/meteorlake/Kconfig | 3 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/include/soc/itss.h | 2 |
2 files changed, 2 insertions, 3 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index 8c4158ba702b..c70e472d73ee 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -142,8 +142,7 @@ config HEAP_SIZE hex default 0x10000 -# Intel recommends reserving the following resources per PCIe TBT root port, -# from ADL BIOS Spec (doc #627270) Revision 0.6.0 Section 7.2.5.1.5 +# Intel recommends reserving the PCIe TBT root port resources as below: # - 42 buses # - 194 MiB Non-prefetchable memory # - 448 MiB Prefetchable memory diff --git a/src/soc/intel/meteorlake/include/soc/itss.h b/src/soc/intel/meteorlake/include/soc/itss.h index 74ee5ab8c874..a0347d60637d 100644 --- a/src/soc/intel/meteorlake/include/soc/itss.h +++ b/src/soc/intel/meteorlake/include/soc/itss.h @@ -10,4 +10,4 @@ #define IRQS_PER_IPC 32 #define NUM_IPC_REGS ((ITSS_MAX_IRQ + IRQS_PER_IPC - 1)/IRQS_PER_IPC) -#endif /* SOC_INTEL_ADL_ITSS_H */ +#endif /* SOC_INTEL_MTL_ITSS_H */ |