diff options
| author | Shunqian Zheng <zhengsq@rock-chips.com> | 2017-01-10 11:10:46 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2017-03-07 17:47:08 +0100 |
| commit | a24c81cd304c10911a8aae75f9d95bc1fa9574ca (patch) | |
| tree | e7ea733d92ea01128a5a6c61e02288ad3baa9c57 /src/soc/intel/quark | |
| parent | c1749718d1b7bb4474198967983685c558015416 (diff) | |
| download | coreboot-a24c81cd304c10911a8aae75f9d95bc1fa9574ca.tar.gz coreboot-a24c81cd304c10911a8aae75f9d95bc1fa9574ca.tar.bz2 coreboot-a24c81cd304c10911a8aae75f9d95bc1fa9574ca.zip | |
google/gru: add MAX_SDRAM_FREQ config to choose max ddr freq
Gru/Kevin use 933 MHz (actually 928 MHz for better jitter) as max sdram
frequency, while bob uses 800 MHz.
It's normal some variants can't meet 928 MHz SI requirement and hence
have to use a lower freq as spec.
BUG=chrome-os-partner:61001
BRANCH=gru
TEST=check dpll is 800 MHz on bob
Change-Id: I6d19a351f25d1f48547715ce57c3a87d9505f6f1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8176bfea52422c713f144ffec419752aeca66db2
Original-Change-Id: I46afba8d091f1489feeb20cafc44decaa81601fc
Original-Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Original-Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/420208
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Original-Commit-Queue: Shasha Zhao <Sarah_Zhao@asus.com>
Original-Tested-by: Shasha Zhao <Sarah_Zhao@asus.com>
Original-(cherry picked from commit eba5dff79eeedae5ff608d2d8d297ccf9c13cb55)
Original-Reviewed-on: https://chromium-review.googlesource.com/448277
Original-Reviewed-by: Derek Basehore <dbasehore@chromium.org>
Reviewed-on: https://review.coreboot.org/18581
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/quark')
0 files changed, 0 insertions, 0 deletions