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| author | Angel Pons <th3fanbus@gmail.com> | 2021-04-17 13:02:37 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-04-21 09:17:40 +0000 |
| commit | 505e383ccbe4cec2483341833e92ea8c1d9330e8 (patch) | |
| tree | c37af425b5babc4db89b05f461dcd7418572bb69 /src/soc/intel/skylake/Makefile.inc | |
| parent | f643b63c4dcd74c3de0c1d54de8b740d831d6d73 (diff) | |
| download | coreboot-505e383ccbe4cec2483341833e92ea8c1d9330e8.tar.gz coreboot-505e383ccbe4cec2483341833e92ea8c1d9330e8.tar.bz2 coreboot-505e383ccbe4cec2483341833e92ea8c1d9330e8.zip | |
soc/intel: Move pmc_soc_set_afterg3_en() to pmutil.c
Commit 2c26108208e4aa48de21be576ab6cad9286d7934 moved this function to
pmutil.c for Tiger Lake. Do this to all other platforms for consistency.
For Skylake, __SIMPLE_DEVICE__ preprocessor guards are no longer needed.
With this change, pmc.c is only needed in ramstage. Adjust Makefile.inc
accordingly, and drop ENV_RAMSTAGE guards from Skylake.
Change-Id: I424eb359c898f155659d085b888410b6bb58b9ed
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel/skylake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 1a4f740156a0..8dbadcc0383d 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -32,7 +32,6 @@ romstage-y += gpio.c romstage-y += gspi.c romstage-y += i2c.c romstage-y += me.c -romstage-y += pmc.c romstage-y += pmutil.c romstage-y += reset.c romstage-y += spi.c @@ -66,7 +65,6 @@ ramstage-y += xhci.c smm-y += elog.c smm-y += gpio.c smm-y += p2sb.c -smm-y += pmc.c smm-y += pmutil.c smm-y += smihandler.c smm-y += uart.c |