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| author | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-16 16:44:36 -0700 |
|---|---|---|
| committer | Lee Leahy <leroy.p.leahy@intel.com> | 2017-03-17 02:34:52 +0100 |
| commit | b439a929392ba54dee43455f6e164b884cb8c308 (patch) | |
| tree | ffc44834d8ff6144d360a356dab0688e006945af /src/soc/intel/skylake/chip.c | |
| parent | 573564cca8cd01cadf179546b8b124694fd3dcbb (diff) | |
| download | coreboot-b439a929392ba54dee43455f6e164b884cb8c308.tar.gz coreboot-b439a929392ba54dee43455f6e164b884cb8c308.tar.bz2 coreboot-b439a929392ba54dee43455f6e164b884cb8c308.zip | |
soc/intel/skylake: Wrap lines at 80 columns
Fix the following warning detected by checkpatch:
WARNING: line over 80 characters
TEST=Build for glados
Change-Id: I79341f46ca06ac052f987975ccaf975470d27806
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18867
Tested-by: build bot (Jenkins)
Reviewed-by: Lee Leahy <leroy.p.leahy@intel.com>
Diffstat (limited to 'src/soc/intel/skylake/chip.c')
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 6d9dedb730c9..61975c648c64 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -147,14 +147,17 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) params->EnableSata = config->EnableSata; params->SataMode = config->SataMode; params->LockDownConfigGlobalSmi = config->LockDownConfigGlobalSmi; - params->LockDownConfigBiosInterface = config->LockDownConfigBiosInterface; + params->LockDownConfigBiosInterface = + config->LockDownConfigBiosInterface; params->LockDownConfigRtcLock = config->LockDownConfigRtcLock; params->LockDownConfigBiosLock = config->LockDownConfigBiosLock; params->LockDownConfigSpiEiss = config->LockDownConfigSpiEiss; params->PchConfigSubSystemVendorId = config->PchConfigSubSystemVendorId; params->PchConfigSubSystemId = config->PchConfigSubSystemId; - params->WakeConfigWolEnableOverride = config->WakeConfigWolEnableOverride; - params->WakeConfigPcieWakeFromDeepSx = config->WakeConfigPcieWakeFromDeepSx; + params->WakeConfigWolEnableOverride = + config->WakeConfigWolEnableOverride; + params->WakeConfigPcieWakeFromDeepSx = + config->WakeConfigPcieWakeFromDeepSx; params->PmConfigDeepSxPol = config->PmConfigDeepSxPol; params->PmConfigSlpS3MinAssert = config->PmConfigSlpS3MinAssert; params->PmConfigSlpS4MinAssert = config->PmConfigSlpS4MinAssert; @@ -162,11 +165,13 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) params->PmConfigSlpAMinAssert = config->PmConfigSlpAMinAssert; params->PmConfigPciClockRun = config->PmConfigPciClockRun; params->PmConfigSlpStrchSusUp = config->PmConfigSlpStrchSusUp; - params->PmConfigPwrBtnOverridePeriod = config->PmConfigPwrBtnOverridePeriod; + params->PmConfigPwrBtnOverridePeriod = + config->PmConfigPwrBtnOverridePeriod; params->PmConfigPwrCycDur = config->PmConfigPwrCycDur; params->SerialIrqConfigSirqEnable = config->SerialIrqConfigSirqEnable; params->SerialIrqConfigSirqMode = config->SerialIrqConfigSirqMode; - params->SerialIrqConfigStartFramePulse = config->SerialIrqConfigStartFramePulse; + params->SerialIrqConfigStartFramePulse = + config->SerialIrqConfigStartFramePulse; params->SkipMpInit = config->FspSkipMpInit; |