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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-05-31 20:03:11 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-16 08:03:44 +0000 |
| commit | 040c531158861284b7d21f1e8a26b1f6d4ccad58 (patch) | |
| tree | 885d3a1d85c9361572cc4992f0d455222649f4bf /src/soc/intel/skylake/cpu.c | |
| parent | 21ba5eea89be9ee5019b3651814dfe148f16bc81 (diff) | |
| download | coreboot-040c531158861284b7d21f1e8a26b1f6d4ccad58.tar.gz coreboot-040c531158861284b7d21f1e8a26b1f6d4ccad58.tar.bz2 coreboot-040c531158861284b7d21f1e8a26b1f6d4ccad58.zip | |
soc/intel/common: Replace smm_soutbridge_enable(SMI_FLAGS)
Change-Id: I8c4dc5ab91891de9737189bd7ae86df18d86f758
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41960
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/skylake/cpu.c')
| -rw-r--r-- | src/soc/intel/skylake/cpu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 89b7cb6f9d09..49d817ffef0f 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -294,7 +294,7 @@ static void post_mp_init(void) * Now that all APs have been relocated as well as the BSP let SMIs * start flowing. */ - smm_southbridge_enable(GBL_EN); + global_smi_enable_no_pwrbtn(); /* Lock down the SMRAM space. */ if (CONFIG(HAVE_SMI_HANDLER)) |