diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-02-16 13:20:13 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-18 10:11:55 +0000 |
| commit | 1999bc5d001aa57f18fa264d9101afc7174baf26 (patch) | |
| tree | 66c61abfffa69bcaa591f5c17165349aa6b67720 /src/soc/intel/skylake/cpu.c | |
| parent | c027ece821ed3f65f7c08fb0b6d9b707401dddc4 (diff) | |
| download | coreboot-1999bc5d001aa57f18fa264d9101afc7174baf26.tar.gz coreboot-1999bc5d001aa57f18fa264d9101afc7174baf26.tar.bz2 coreboot-1999bc5d001aa57f18fa264d9101afc7174baf26.zip | |
soc/intel/skylake: Move soc_fsp_load
Move this function into the compilation unit where it is called.
Change-Id: Ia4bdcd545827c2564430521a98246fc96bf0ba92
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50796
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/cpu.c')
| -rw-r--r-- | src/soc/intel/skylake/cpu.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 307c84955097..4cadb7f9ee7f 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -176,6 +176,11 @@ static void post_mp_init(void) printk(BIOS_CRIT, "CRITICAL ERROR: MP post init failed\n"); } +static void soc_fsp_load(void) +{ + fsps_load(); +} + static const struct mp_ops mp_ops = { /* * Skip Pre MP init MTRR programming as MTRRs are mirrored from BSP, |