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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-12-03 18:22:06 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-12-20 17:46:37 +0000 |
| commit | f97c1c9d86ff56ba9d1de4fc7c9499742224d365 (patch) | |
| tree | fabc883853e92f997d6e31efddd770e649d0ee35 /src/soc/intel/skylake/elog.c | |
| parent | 836b8d2e4509fb041a15df6d1ce3b20e205260bb (diff) | |
| download | coreboot-f97c1c9d86ff56ba9d1de4fc7c9499742224d365.tar.gz coreboot-f97c1c9d86ff56ba9d1de4fc7c9499742224d365.tar.bz2 coreboot-f97c1c9d86ff56ba9d1de4fc7c9499742224d365.zip | |
{nb,soc}: Replace min/max() with MIN/MAX()
Use MIN() and MAX() defined in commonlib/helpers.h
Change-Id: I02d0a47937bc2d6ab2cd01995a2c6b6db245da15
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37454
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/skylake/elog.c')
| -rw-r--r-- | src/soc/intel/skylake/elog.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/elog.c b/src/soc/intel/skylake/elog.c index 795139418ddd..411b3e99a184 100644 --- a/src/soc/intel/skylake/elog.c +++ b/src/soc/intel/skylake/elog.c @@ -16,6 +16,7 @@ #include <bootstate.h> #include <cbmem.h> +#include <commonlib/helpers.h> #include <console/console.h> #include <device/mmio.h> #include <device/pci_ops.h> @@ -156,7 +157,7 @@ static void pch_log_rp_wake_source(void) { PCH_DEV_PCIE24, 0x60, ELOG_WAKE_SOURCE_PME_PCIE24 }, }; - maxports = min(CONFIG_MAX_ROOT_PORTS, ARRAY_SIZE(pme_status_info)); + maxports = MIN(CONFIG_MAX_ROOT_PORTS, ARRAY_SIZE(pme_status_info)); for (i = 0; i < maxports; i++) { dev = pme_status_info[i].dev; |