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| author | Andy Pont <andy.pont@sdcsystems.com> | 2021-06-08 10:30:35 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-06-10 05:37:18 +0000 |
| commit | d2f52ff05337717ae15725b035bd7b4393f3d379 (patch) | |
| tree | 7f49e9d7323ff80c1f69483c29f7a319bbc71f99 /src/soc/intel/tigerlake/Kconfig | |
| parent | 66b090a22695caa863b35597ec7c71226f56ac8a (diff) | |
| download | coreboot-d2f52ff05337717ae15725b035bd7b4393f3d379.tar.gz coreboot-d2f52ff05337717ae15725b035bd7b4393f3d379.tar.bz2 coreboot-d2f52ff05337717ae15725b035bd7b4393f3d379.zip | |
soc/intel/tigerlake: Move MAX_CPUS to Kconfig
Most of the Kconfig files for Intel SOC devices define the MAX_CPUS
value within src/soc/intel/*/Kconfig.
Move the definition there for Tiger Lake and remove from the mainboard
Kconfig files.
Signed-off-by: Andy Pont <andy.pont@sdcsystems.com>
Change-Id: If145b9eb5d99821f4ce513118e4417d05f821ef5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55307
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/Kconfig')
| -rw-r--r-- | src/soc/intel/tigerlake/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 95a0337136c4..4ec163b9c134 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -77,6 +77,10 @@ config CPU_SPECIFIC_OPTIONS select DISPLAY_FSP_VERSION_INFO select HECI_DISABLE_USING_SMM +config MAX_CPUS + int + default 8 + config DCACHE_RAM_BASE default 0xfef00000 |