summaryrefslogtreecommitdiffstats
path: root/src/soc/intel/tigerlake/Kconfig
diff options
context:
space:
mode:
authorTim Crawford <tcrawford@system76.com>2021-08-30 13:08:36 -0600
committerFelix Held <felix-coreboot@felixheld.de>2021-09-02 15:31:12 +0000
commitf496286bdce061fce5a54a8ea2befbaf2ebdb12a (patch)
tree7c0067b5e28e8dcc0ef6fe740a6a32b3d931c9d7 /src/soc/intel/tigerlake/Kconfig
parentf05bd8830de6229f11ab69cca5c4e069e180b3b9 (diff)
downloadcoreboot-f496286bdce061fce5a54a8ea2befbaf2ebdb12a.tar.gz
coreboot-f496286bdce061fce5a54a8ea2befbaf2ebdb12a.tar.bz2
coreboot-f496286bdce061fce5a54a8ea2befbaf2ebdb12a.zip
soc/intel/tigerlake: Set MAX_CPUS for TGL-H to 16
TGL-H supports up to 8 cores (16 threads). Change-Id: I2ee1be37f564bf1b6249a6c223be093747c38ab5 Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/57267 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/tigerlake/Kconfig')
-rw-r--r--src/soc/intel/tigerlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index 3defba4869bc..4ae25f03664d 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -85,6 +85,7 @@ config CPU_SPECIFIC_OPTIONS
config MAX_CPUS
int
+ default 16 if SOC_INTEL_TIGERLAKE_PCH_H
default 8
config DCACHE_RAM_BASE