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| author | Subrata Banik <subrata.banik@intel.com> | 2020-09-29 14:28:09 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-10-03 04:18:46 +0000 |
| commit | 78463a7d26506d6e38917e9bf98ac0dd82663565 (patch) | |
| tree | 015c8c8ed87f030ecac790f29431b9cb7d89e8c5 /src/soc/intel/tigerlake/espi.c | |
| parent | 1366e4438d07c2de905454421e18d1e5f68de47d (diff) | |
| download | coreboot-78463a7d26506d6e38917e9bf98ac0dd82663565.tar.gz coreboot-78463a7d26506d6e38917e9bf98ac0dd82663565.tar.bz2 coreboot-78463a7d26506d6e38917e9bf98ac0dd82663565.zip | |
soc/intel: Move soc_pch_pirq_init() to common code
List of changes:
1. Rename soc_pch_pirq_init() as pch_pirq_init() and
move into common block code.
2. Remove redundant LPC functions from SoC directory and
refer from block/lpc directory.
TEST=Able to build and boot hatch and tglrvp platform without seeing
any functional impact.
Change-Id: I856b5ca024e58fd14b4d1721f23d9516a283ebf8
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45809
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/tigerlake/espi.c')
| -rw-r--r-- | src/soc/intel/tigerlake/espi.c | 70 |
1 files changed, 1 insertions, 69 deletions
diff --git a/src/soc/intel/tigerlake/espi.c b/src/soc/intel/tigerlake/espi.c index eb44a6a65db8..668e95f41d95 100644 --- a/src/soc/intel/tigerlake/espi.c +++ b/src/soc/intel/tigerlake/espi.c @@ -71,74 +71,6 @@ static void soc_mirror_dmi_pcr_io_dec(void) soc_setup_dmi_pcr_io_dec(&io_dec_arr[0]); } -/* - * PIRQ[n]_ROUT[3:0] - PIRQ Routing Control - * 0x00 - 0000 = Reserved - * 0x01 - 0001 = Reserved - * 0x02 - 0010 = Reserved - * 0x03 - 0011 = IRQ3 - * 0x04 - 0100 = IRQ4 - * 0x05 - 0101 = IRQ5 - * 0x06 - 0110 = IRQ6 - * 0x07 - 0111 = IRQ7 - * 0x08 - 1000 = Reserved - * 0x09 - 1001 = IRQ9 - * 0x0A - 1010 = IRQ10 - * 0x0B - 1011 = IRQ11 - * 0x0C - 1100 = IRQ12 - * 0x0D - 1101 = Reserved - * 0x0E - 1110 = IRQ14 - * 0x0F - 1111 = IRQ15 - * PIRQ[n]_ROUT[7] - PIRQ Routing Control - * 0x80 - The PIRQ is not routed. - */ - -void soc_pch_pirq_init(const struct device *dev) -{ - struct device *irq_dev; - uint8_t pch_interrupt_routing[MAX_PXRC_CONFIG]; - - pch_interrupt_routing[0] = PCH_IRQ11; - pch_interrupt_routing[1] = PCH_IRQ10; - pch_interrupt_routing[2] = PCH_IRQ11; - pch_interrupt_routing[3] = PCH_IRQ11; - pch_interrupt_routing[4] = PCH_IRQ11; - pch_interrupt_routing[5] = PCH_IRQ11; - pch_interrupt_routing[6] = PCH_IRQ11; - pch_interrupt_routing[7] = PCH_IRQ11; - - itss_irq_init(pch_interrupt_routing); - - for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { - u8 int_pin = 0, int_line = 0; - - if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) - continue; - - int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN); - - switch (int_pin) { - case 1: /* INTA# */ - int_line = PCH_IRQ11; - break; - case 2: /* INTB# */ - int_line = PCH_IRQ10; - break; - case 3: /* INTC# */ - int_line = PCH_IRQ11; - break; - case 4: /* INTD# */ - int_line = PCH_IRQ11; - break; - } - - if (!int_line) - continue; - - pci_write_config8(irq_dev, PCI_INTERRUPT_LINE, int_line); - } -} - static void pch_misc_init(void) { uint8_t reg8; @@ -168,7 +100,7 @@ void lpc_soc_init(struct device *dev) /* Interrupt configuration */ pch_enable_ioapic(); - soc_pch_pirq_init(dev); + pch_pirq_init(); setup_i8259(); i8259_configure_irq_trigger(9, 1); soc_mirror_dmi_pcr_io_dec(); |