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| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-03-22 16:39:57 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-03-28 16:04:23 +0000 |
| commit | eb6ebc025ed5de4985ef756efe38917fca827981 (patch) | |
| tree | 943e7e0f75ae3446345746127a6d16cd3b438e1d /src/soc/intel/tigerlake/fsp_params.c | |
| parent | 6edbb18901565d60bc61fda9ac75da08cb94ff84 (diff) | |
| download | coreboot-eb6ebc025ed5de4985ef756efe38917fca827981.tar.gz coreboot-eb6ebc025ed5de4985ef756efe38917fca827981.tar.bz2 coreboot-eb6ebc025ed5de4985ef756efe38917fca827981.zip | |
soc/intel/tigerlake: Move TCSS code to intel/common/block
The Type-C subsystem ("TCSS") IP block is similar between TGL and
ADL. For pre-boot purposes, the limited amount of functionality required
appears to be common between the two, therefore move the functionality
to intel/common/block and rename from `early_tcss to `tcss` along the way.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I1c6bb9c7098691f0c828f9d5ab4bd522515ae966
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51753
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/fsp_params.c')
| -rw-r--r-- | src/soc/intel/tigerlake/fsp_params.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index 6d08e1f68c5c..6bd4a7cbe12d 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -14,10 +14,10 @@ #include <intelblocks/lpss.h> #include <intelblocks/mp_init.h> #include <intelblocks/pmclib.h> +#include <intelblocks/tcss.h> #include <intelblocks/xdci.h> #include <intelpch/lockdown.h> #include <security/vboot/vboot_common.h> -#include <soc/early_tcss.h> #include <soc/gpio_soc_defs.h> #include <soc/intel/common/vbt.h> #include <soc/pci_devs.h> @@ -463,8 +463,9 @@ void platform_fsp_multi_phase_init_cb(uint32_t phase_index) /* TCSS specific initialization here */ printk(BIOS_DEBUG, "FSP MultiPhaseSiInit %s/%s called\n", __FILE__, __func__); - if (CONFIG(EARLY_TCSS)) - tcss_early_configure(); + + if (CONFIG(SOC_INTEL_COMMON_BLOCK_TCSS)) + tcss_configure(); break; default: break; |