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authorMichael Niewöhner <foss@mniewoehner.de>2021-09-27 18:45:10 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2021-10-17 13:57:53 +0000
commit6eaffcdbb13b13aad20a4ea0f06f361432daf713 (patch)
tree2ffbb6a747f34f86088f6acf3eab48200366e687 /src/soc/intel/tigerlake
parent01b3c40bfef5f5789a8521da766be8792eeb06c2 (diff)
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soc/intel: implement ACPI timer disabling per SoC and drop common code
Since it's just a one-liner, implement disabling of the ACPI timer in soc code. This reduces complexity. Change-Id: I434ea87d00f6e919983d9229f79d4adb352fbf27 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58020 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/tigerlake')
-rw-r--r--src/soc/intel/tigerlake/Kconfig1
-rw-r--r--src/soc/intel/tigerlake/pmc.c2
2 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index fe7805ae7089..1e9a85179ff6 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -42,7 +42,6 @@ config CPU_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP2_2
select PM_ACPI_TIMER_OPTIONAL
select PMC_GLOBAL_RESET_ENABLE_LOCK
- select PMC_LOW_POWER_MODE_PROGRAM
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK
diff --git a/src/soc/intel/tigerlake/pmc.c b/src/soc/intel/tigerlake/pmc.c
index 01891e1be9fb..878817036833 100644
--- a/src/soc/intel/tigerlake/pmc.c
+++ b/src/soc/intel/tigerlake/pmc.c
@@ -159,7 +159,7 @@ static void soc_pmc_init(struct device *dev)
* Disabling ACPI PM timer also switches off TCO
*/
if (!CONFIG(USE_PM_ACPI_TIMER))
- pmc_disable_acpi_timer();
+ setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS);
}
static void pm1_enable_pwrbtn_smi(void *unused)