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| author | Matt DeVillier <matt.devillier@gmail.com> | 2023-08-31 10:06:00 -0500 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-09-01 21:26:47 +0000 |
| commit | ecf2b42e73d955737f9af7adf2bfcf9bcf29f41f (patch) | |
| tree | 376bfad54a18d00022b08d8a2c8aa7492785699f /src/soc/intel/tigerlake | |
| parent | bed01d794f0b94f2a3cf4c1a3a45f7536b05d288 (diff) | |
| download | coreboot-ecf2b42e73d955737f9af7adf2bfcf9bcf29f41f.tar.gz coreboot-ecf2b42e73d955737f9af7adf2bfcf9bcf29f41f.tar.bz2 coreboot-ecf2b42e73d955737f9af7adf2bfcf9bcf29f41f.zip | |
soc/intel/{adl,jsl,mtl,tgl}: Add ACPI name for GNA device
Add SA_DEV_SLOT_GNA definition to SoCs missing it, so the name
resolves properly.
TEST=tested with rest of patch train
Change-Id: I31c8b14e5083fc8e212a4e32330125fa72696c73
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Signed-off-by: CoolStar <coolstarorganization@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake')
| -rw-r--r-- | src/soc/intel/tigerlake/chip.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/tigerlake/include/soc/pci_devs.h | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c index 242ec987d214..15281c8c465d 100644 --- a/src/soc/intel/tigerlake/chip.c +++ b/src/soc/intel/tigerlake/chip.c @@ -83,6 +83,7 @@ const char *soc_acpi_name(const struct device *dev) case SA_DEVFN_TBT2: return "TRP2"; case SA_DEVFN_TBT3: return "TRP3"; case SA_DEVFN_IPU: return "IPU0"; + case SA_DEVFN_GNA: return "GNA"; case PCH_DEVFN_ISH: return "ISHB"; case PCH_DEVFN_XHCI: return "XHCI"; case PCH_DEVFN_I2C0: return "I2C0"; diff --git a/src/soc/intel/tigerlake/include/soc/pci_devs.h b/src/soc/intel/tigerlake/include/soc/pci_devs.h index 7a9ea32eea4b..d93c97f3c33e 100644 --- a/src/soc/intel/tigerlake/include/soc/pci_devs.h +++ b/src/soc/intel/tigerlake/include/soc/pci_devs.h @@ -57,6 +57,10 @@ #define SA_DEV_TBT2 PCI_DEV(0, SA_DEV_SLOT_TBT, 2) #define SA_DEV_TBT3 PCI_DEV(0, SA_DEV_SLOT_TBT, 3) +#define SA_DEV_SLOT_GNA 0x08 +#define SA_DEVFN_GNA PCI_DEVFN(SA_DEV_SLOT_GNA, 0) +#define SA_DEV_GNA PCI_DEV(0, SA_DEV_SLOT_GNA, 0) + #define SA_DEV_SLOT_TMT 0x0A #define SA_DEVFN_TMT _SA_DEVFN(TMT) #define SA_DEV_TMT _SA_DEV(TMT) |