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| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-02-14 13:53:28 +0100 |
|---|---|---|
| committer | Patrick Rudolph <patrick.rudolph@9elements.com> | 2024-02-23 07:45:08 +0000 |
| commit | 89cacb9050a9d2de91f0770dc1521ca1be7160be (patch) | |
| tree | 4a7d31b46353edd189a2a00ca65850edea0b8bc3 /src/soc/intel/xeon_sp/include/soc/chip_common.h | |
| parent | 1d3838b6237fefccc3a4c4b0848025dfd32918f5 (diff) | |
| download | coreboot-89cacb9050a9d2de91f0770dc1521ca1be7160be.tar.gz coreboot-89cacb9050a9d2de91f0770dc1521ca1be7160be.tar.bz2 coreboot-89cacb9050a9d2de91f0770dc1521ca1be7160be.zip | |
soc/intel/xeon_sp/uncore: Read VtdBar
Read the VtdBar and add it to the resources of the host bridge PCI
device. The BAR is already marked as PciResourceMem32 in the parent
PCI domain.
This allows easy probing for VTD devices with enabled VtdBars in the
next commit, without the need to look up the stack HOB.
Change-Id: Id579a94e653473f3dd0dccea6e33dc64f792d028
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/xeon_sp/include/soc/chip_common.h')
0 files changed, 0 insertions, 0 deletions