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| author | Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com> | 2025-04-24 08:50:15 +0000 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@gmail.com> | 2025-04-29 14:36:03 +0000 |
| commit | 08722cd9f95de5f2c5625f3e12f3129bcdfce4fa (patch) | |
| tree | e43891a2745bd37ee8ed041567f5cd1beb304411 /src/soc/intel/xeon_sp/numa.c | |
| parent | c0920396d04f7b0369ee1ba9d3a02984bc599a7d (diff) | |
| download | coreboot-main.tar.gz coreboot-main.tar.bz2 coreboot-main.zip | |
Add Ziliatech SDVB8D8A34XGCL3N3T as id 2, resulting in the list below:
DRAM Part Name ID to assign
MT53E512M32D1NP-046 WT:B 0 (0000)
K4U6E3S4AA-MGCR 0 (0000)
H54G46CYRBX267 0 (0000)
CXDB4CBAM-ML-A 1 (0001)
SDVB8D8A34XGCL3N3T 2 (0010)
BUG=b:398700043
BRANCH=None
TEST=Use part_id_gen to generate related settings
Signed-off-by: Yunlong Jia <yunlong.jia@ecs.corp-partner.google.com>
Change-Id: If85ea78828ab520d10dcbe4ccbba685ac1746c51
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87440
Reviewed-by: Derek Huang <derekhuang@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/numa.c')
0 files changed, 0 insertions, 0 deletions