diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-12-16 11:30:40 +0100 |
|---|---|---|
| committer | Marc Jones <marc@marcjonesconsulting.com> | 2020-12-16 14:58:44 +0000 |
| commit | 83463076033f30c2b0693b1f39a01cfb9c679cf9 (patch) | |
| tree | f879d5c9fe28c283ec8f6d9ea5459311609c15cf /src/soc/intel/xeon_sp/skx | |
| parent | c7b63edeb47963ae97aa3478d45aaa8f4fa0cdf0 (diff) | |
| download | coreboot-83463076033f30c2b0693b1f39a01cfb9c679cf9.tar.gz coreboot-83463076033f30c2b0693b1f39a01cfb9c679cf9.tar.bz2 coreboot-83463076033f30c2b0693b1f39a01cfb9c679cf9.zip | |
soc/intel/xeon_sp: Move DMICTL lock
On SKX FSP-M does not return if this is set too early.
Tested on OCP/Tiogapass, boots.
Change-Id: Ib8ef7bab36bfd4b62988768753d10b4d7b7d567f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48657
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/skx')
| -rw-r--r-- | src/soc/intel/xeon_sp/skx/chip.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c index 0505ea7eff20..f101973864fe 100644 --- a/src/soc/intel/xeon_sp/skx/chip.c +++ b/src/soc/intel/xeon_sp/skx/chip.c @@ -45,6 +45,7 @@ static void soc_init(void *data) printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n"); fsp_silicon_init(false); override_hpet_ioapic_bdf(); + pch_lock_dmictl(); } static void soc_final(void *data) |