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| author | Shuo Liu <shuo.liu@intel.com> | 2024-01-20 02:52:17 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-20 12:40:15 +0000 |
| commit | 08f1f05bf6592359e3a4b1d1eaff8223e012684e (patch) | |
| tree | f8cb84a96340b9bb8e5b3135b67de5c9080e3b03 /src/soc/intel/xeon_sp/spr/ioat.c | |
| parent | 94ff128c91f02fce31c672ff8317c9098018f3e8 (diff) | |
| download | coreboot-08f1f05bf6592359e3a4b1d1eaff8223e012684e.tar.gz coreboot-08f1f05bf6592359e3a4b1d1eaff8223e012684e.tar.bz2 coreboot-08f1f05bf6592359e3a4b1d1eaff8223e012684e.zip | |
soc/intel/xeon_sp: Add support for is_ioat_iio_stack_res
IOAT is the term for the on-chip accelerator technology of
Xeon-SP. In CPX and SPR, IOAT stack is also named as DINO stack.
Different SoC has different check criteria for IOAT stacks,
this patch introduces an util function to abstract these differences
as well as cleaning up the usage of names.
TEST=intel/archercity CRB
Change-Id: I376928ad89b68b294734000678dad6f070d3c97d
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80578
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/spr/ioat.c')
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/ioat.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/spr/ioat.c b/src/soc/intel/xeon_sp/spr/ioat.c index 60936a8a42c9..0d81d0d2ef74 100644 --- a/src/soc/intel/xeon_sp/spr/ioat.c +++ b/src/soc/intel/xeon_sp/spr/ioat.c @@ -86,7 +86,7 @@ void soc_create_ioat_domains(const union xeon_domain_path path, struct bus *cons /* The FSP HOB doesn't provide accurate information about the resource allocation. Hence use pre-defined offsets. Based - on ACPI code in create_dsdt_dino_resource(), soc_acpi.c: */ + on ACPI code in create_dsdt_ioat_resource(), soc_acpi.c: */ resource_t mem64_base, mem64_limit, bus_base, bus_limit; /* CPM0 */ |