soc/intel/jasperlake: Make use of FSP_ARRAY_LOAD macro

Add FSP_ARRAY_LOAD macro for checking and loading array type
configs into array type UPDs to increase readability.

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: Ia20cabcaf9724882c68633eb9b510230e993768c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>

2 files changed, 12 insertions, 54 deletions

diff --git a/src/soc/intel/jasperlake/fsp_params.c b/src/soc/intel/jasperlake/fsp_params.c
index 4f2b936c4b0a..9056943efd6a 100644
--- a/src/soc/intel/jasperlake/fsp_params.c
+++ b/src/soc/intel/jasperlake/fsp_params.c
@@ -35,32 +35,15 @@ static void parse_devicetree(FSP_S_CONFIG *params)
 	/* LPSS controllers configuration */
 
 	/* I2C */
-	_Static_assert(ARRAY_SIZE(params->SerialIoI2cMode) >=
-			ARRAY_SIZE(config->SerialIoI2cMode), "copy buffer overflow!");
-	memcpy(params->SerialIoI2cMode, config->SerialIoI2cMode,
-		sizeof(config->SerialIoI2cMode));
+	FSP_ARRAY_LOAD(params->SerialIoI2cMode, config->SerialIoI2cMode);
 
 	/* GSPI */
-	_Static_assert(ARRAY_SIZE(params->SerialIoSpiMode) >=
-			ARRAY_SIZE(config->SerialIoGSpiMode), "copy buffer overflow!");
-	memcpy(params->SerialIoSpiMode, config->SerialIoGSpiMode,
-		sizeof(config->SerialIoGSpiMode));
-
-	_Static_assert(ARRAY_SIZE(params->SerialIoSpiCsMode) >=
-			ARRAY_SIZE(config->SerialIoGSpiCsMode), "copy buffer overflow!");
-	memcpy(params->SerialIoSpiCsMode, config->SerialIoGSpiCsMode,
-		sizeof(config->SerialIoGSpiCsMode));
-
-	_Static_assert(ARRAY_SIZE(params->SerialIoSpiCsState) >=
-			ARRAY_SIZE(config->SerialIoGSpiCsState), "copy buffer overflow!");
-	memcpy(params->SerialIoSpiCsState, config->SerialIoGSpiCsState,
-		sizeof(config->SerialIoGSpiCsState));
+	FSP_ARRAY_LOAD(params->SerialIoSpiMode, config->SerialIoGSpiMode);
+	FSP_ARRAY_LOAD(params->SerialIoSpiCsMode, config->SerialIoGSpiCsMode);
+	FSP_ARRAY_LOAD(params->SerialIoSpiCsState, config->SerialIoGSpiCsState);
 
 	/* UART */
-	_Static_assert(ARRAY_SIZE(params->SerialIoUartMode) >=
-			ARRAY_SIZE(config->SerialIoUartMode), "copy buffer overflow!");
-	memcpy(params->SerialIoUartMode, config->SerialIoUartMode,
-		sizeof(config->SerialIoUartMode));
+	FSP_ARRAY_LOAD(params->SerialIoUartMode, config->SerialIoUartMode);
 }
 
 /* UPD parameters to be initialized before SiliconInit */
@@ -151,15 +134,8 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 		params->SataMode = config->SataMode;
 		params->SataSalpSupport = config->SataSalpSupport;
 
-		_Static_assert(ARRAY_SIZE(params->SataPortsEnable) >=
-				ARRAY_SIZE(config->SataPortsEnable), "copy buffer overflow!");
-		memcpy(params->SataPortsEnable, config->SataPortsEnable,
-				sizeof(params->SataPortsEnable));
-
-		_Static_assert(ARRAY_SIZE(params->SataPortsDevSlp) >=
-				ARRAY_SIZE(config->SataPortsDevSlp), "copy buffer overflow!");
-		memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp,
-				sizeof(params->SataPortsDevSlp));
+		FSP_ARRAY_LOAD(params->SataPortsEnable, config->SataPortsEnable);
+		FSP_ARRAY_LOAD(params->SataPortsDevSlp, config->SataPortsDevSlp);
 	}
 
 	/* VR Configuration */
diff --git a/src/soc/intel/jasperlake/romstage/fsp_params.c b/src/soc/intel/jasperlake/romstage/fsp_params.c
index 780646d30e2f..c1208e3cb92e 100644
--- a/src/soc/intel/jasperlake/romstage/fsp_params.c
+++ b/src/soc/intel/jasperlake/romstage/fsp_params.c
@@ -35,15 +35,8 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 
 	m_cfg->PcieRpEnableMask = mask;
 
-	_Static_assert(ARRAY_SIZE(m_cfg->PcieClkSrcUsage) >=
-			ARRAY_SIZE(config->PcieClkSrcUsage), "copy buffer overflow!");
-	memcpy(m_cfg->PcieClkSrcUsage, config->PcieClkSrcUsage,
-			sizeof(config->PcieClkSrcUsage));
-
-	_Static_assert(ARRAY_SIZE(m_cfg->PcieClkSrcClkReq) >=
-			ARRAY_SIZE(config->PcieClkSrcClkReq), "copy buffer overflow!");
-	memcpy(m_cfg->PcieClkSrcClkReq, config->PcieClkSrcClkReq,
-			sizeof(config->PcieClkSrcClkReq));
+	FSP_ARRAY_LOAD(m_cfg->PcieClkSrcUsage, config->PcieClkSrcUsage);
+	FSP_ARRAY_LOAD(m_cfg->PcieClkSrcClkReq, config->PcieClkSrcClkReq);
 
 	m_cfg->PrmrrSize = config->PrmrrSize;
 
@@ -107,20 +100,9 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
 	m_cfg->PchHdaDspEnable = config->PchHdaDspEnable;
 	m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable;
 
-	_Static_assert(ARRAY_SIZE(m_cfg->PchHdaAudioLinkDmicEnable) >=
-			ARRAY_SIZE(config->PchHdaAudioLinkDmicEnable), "copy buffer overflow!");
-	memcpy(m_cfg->PchHdaAudioLinkDmicEnable, config->PchHdaAudioLinkDmicEnable,
-		sizeof(config->PchHdaAudioLinkDmicEnable));
-
-	_Static_assert(ARRAY_SIZE(m_cfg->PchHdaAudioLinkSspEnable) >=
-			ARRAY_SIZE(config->PchHdaAudioLinkSspEnable), "copy buffer overflow!");
-	memcpy(m_cfg->PchHdaAudioLinkSspEnable, config->PchHdaAudioLinkSspEnable,
-		sizeof(config->PchHdaAudioLinkSspEnable));
-
-	_Static_assert(ARRAY_SIZE(m_cfg->PchHdaAudioLinkSndwEnable) >=
-			ARRAY_SIZE(config->PchHdaAudioLinkSndwEnable), "copy buffer overflow!");
-	memcpy(m_cfg->PchHdaAudioLinkSndwEnable, config->PchHdaAudioLinkSndwEnable,
-		sizeof(config->PchHdaAudioLinkSndwEnable));
+	FSP_ARRAY_LOAD(m_cfg->PchHdaAudioLinkDmicEnable, config->PchHdaAudioLinkDmicEnable);
+	FSP_ARRAY_LOAD(m_cfg->PchHdaAudioLinkSspEnable, config->PchHdaAudioLinkSspEnable);
+	FSP_ARRAY_LOAD(m_cfg->PchHdaAudioLinkSndwEnable, config->PchHdaAudioLinkSndwEnable);
 
 	/* Skip the CPU replacement check */
 	m_cfg->SkipCpuReplacementCheck = config->SkipCpuReplacementCheck;