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| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-07-05 21:18:50 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-08 13:11:59 +0000 |
| commit | 3edf840ad15154d38769c0115811906284762b11 (patch) | |
| tree | 02b55264c698b3c0fb1422f41ceecf6424a0ae20 /src/soc/intel | |
| parent | cdea508a024376c79c8cf29648ba174867eb2750 (diff) | |
| download | coreboot-3edf840ad15154d38769c0115811906284762b11.tar.gz coreboot-3edf840ad15154d38769c0115811906284762b11.tar.bz2 coreboot-3edf840ad15154d38769c0115811906284762b11.zip | |
cpu/x86/64bit: Turn jumping to long mode into a macro
This makes it easier to reuse, e.g. if you want to do it twice in one
assembly file.
Change-Id: Ida861338004187e4e714be41e17c8447fa4cf935
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79261
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/common/block/cpu/car/cache_as_ram.S | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S index 61cbe307ff62..c22e7d9a5ed6 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S @@ -9,6 +9,7 @@ #include <cpu/x86/post_code.h> #include <intelblocks/msr.h> #include <intelblocks/post_codes.h> +#include <cpu/x86/64bit/entry64.inc> .section .init, "ax", @progbits @@ -279,7 +280,8 @@ car_init_done: andl $0xfffffff0, %esp #if ENV_X86_64 - #include <cpu/x86/64bit/entry64.inc> + setup_longmode $(CONFIG_ARCH_X86_64_PGTBL_LOC) + movd %mm2, %rdi shlq $32, %rdi movd %mm1, %rsi |