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author | Angel Pons <th3fanbus@gmail.com> | 2021-04-05 12:26:51 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2021-04-21 14:21:26 +0000 |
commit | 73a22edcc8894c34df1234ae02d5318f18e3f7b8 (patch) | |
tree | 3c873966bbef0715d9081e2eb04791455f7662c6 /src/soc/intel | |
parent | 84d10cc5d38d706ffecd0cd60f6e1f9d90064f96 (diff) | |
download | coreboot-73a22edcc8894c34df1234ae02d5318f18e3f7b8.tar.gz coreboot-73a22edcc8894c34df1234ae02d5318f18e3f7b8.tar.bz2 coreboot-73a22edcc8894c34df1234ae02d5318f18e3f7b8.zip |
soc/intel: Fix typo in comment
rotine ---> routine
Change-Id: I21a71f52d2ec7a05ea3dadf30e8f3e8dac07d168
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52106
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/cannonlake/gpio_common.c | 2 | ||||
-rw-r--r-- | src/soc/intel/elkhartlake/chip.c | 2 | ||||
-rw-r--r-- | src/soc/intel/icelake/chip.c | 2 | ||||
-rw-r--r-- | src/soc/intel/jasperlake/chip.c | 2 | ||||
-rw-r--r-- | src/soc/intel/tigerlake/chip.c | 2 |
5 files changed, 5 insertions, 5 deletions
diff --git a/src/soc/intel/cannonlake/gpio_common.c b/src/soc/intel/cannonlake/gpio_common.c index 21a5801648c8..2c2dcdbabd28 100644 --- a/src/soc/intel/cannonlake/gpio_common.c +++ b/src/soc/intel/cannonlake/gpio_common.c @@ -5,7 +5,7 @@ /* * Routine to perform below operations: - * 1. SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register + * 1. SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register * 2. Program GPIO PM configuration based on PM mask and value */ void soc_gpio_pm_configuration(void) diff --git a/src/soc/intel/elkhartlake/chip.c b/src/soc/intel/elkhartlake/chip.c index b14edd6cc6bc..3917ea0af8d1 100644 --- a/src/soc/intel/elkhartlake/chip.c +++ b/src/soc/intel/elkhartlake/chip.c @@ -98,7 +98,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; diff --git a/src/soc/intel/icelake/chip.c b/src/soc/intel/icelake/chip.c index 821a9e04ed4c..32b183009634 100644 --- a/src/soc/intel/icelake/chip.c +++ b/src/soc/intel/icelake/chip.c @@ -88,7 +88,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; diff --git a/src/soc/intel/jasperlake/chip.c b/src/soc/intel/jasperlake/chip.c index 1051fbc9abfa..ea29fd8b43e6 100644 --- a/src/soc/intel/jasperlake/chip.c +++ b/src/soc/intel/jasperlake/chip.c @@ -104,7 +104,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; diff --git a/src/soc/intel/tigerlake/chip.c b/src/soc/intel/tigerlake/chip.c index 2a0d7d03262e..1affcce07896 100644 --- a/src/soc/intel/tigerlake/chip.c +++ b/src/soc/intel/tigerlake/chip.c @@ -109,7 +109,7 @@ const char *soc_acpi_name(const struct device *dev) } #endif -/* SoC rotine to fill GPIO PM mask and value for GPIO_MISCCFG register */ +/* SoC routine to fill GPIO PM mask and value for GPIO_MISCCFG register */ static void soc_fill_gpio_pm_configuration(void) { uint8_t value[TOTAL_GPIO_COMM]; |