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| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-07-21 18:08:19 +0200 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2022-07-29 15:01:36 +0000 |
| commit | a01b62a573d580a7b6ef3a50b4d33b4d3263715b (patch) | |
| tree | efbfe17ff0e3e6d44c6a9a7a0801efe43bab1d79 /src/soc/intel | |
| parent | 4b9508b64c3d05d596fb79340f10b5c6c8fedbb6 (diff) | |
| download | coreboot-a01b62a573d580a7b6ef3a50b4d33b4d3263715b.tar.gz coreboot-a01b62a573d580a7b6ef3a50b4d33b4d3263715b.tar.bz2 coreboot-a01b62a573d580a7b6ef3a50b4d33b4d3263715b.zip | |
soc/intel/alderlake: Set VccIn Aux Imon IccMax for ADL-S 4+0 and 2+0
Add missing System Agent PCI IDs for ADL-S 4+0 and 2+0 to configure
VccIn Aux Imon IccMax. They were not present in older 2.1 revision of
DOC #619501. Based on DOC #619501 rev 2.6.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Idfd57ce9b63db5d5fcc9d4efb8aa27ed7cc6222d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index b4482512adff..ec4281d4b596 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -527,6 +527,8 @@ static uint16_t get_vccin_aux_imon_iccmax(void) case PCI_DID_INTEL_ADL_S_ID_3: case PCI_DID_INTEL_ADL_S_ID_8: case PCI_DID_INTEL_ADL_S_ID_10: + case PCI_DID_INTEL_ADL_S_ID_11: + case PCI_DID_INTEL_ADL_S_ID_12: return ICC_MAX_ADL_S; default: printk(BIOS_ERR, "Unknown MCH ID: 0x%4x, skipping VccInAuxImonIccMax config\n", |