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author | Subrata Banik <subrata.banik@intel.com> | 2017-11-07 17:48:35 +0530 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-11-11 18:20:06 +0000 |
commit | c0ec28642fea41b799d0d5e931ff896beebd325b (patch) | |
tree | b552674577cca2c48ada05cd520ad3cfd3d82fd1 /src/soc/intel | |
parent | 5a283ef65cde46229ec2e2e46d68773df34610e2 (diff) | |
download | coreboot-c0ec28642fea41b799d0d5e931ff896beebd325b.tar.gz coreboot-c0ec28642fea41b799d0d5e931ff896beebd325b.tar.bz2 coreboot-c0ec28642fea41b799d0d5e931ff896beebd325b.zip |
soc/intel/apollolake: Add support for SPI device
Provide a translation table to convert SPI device structure
into SPI bus number and vice versa.
Change-Id: I4c8b23c7d6f289927cd7545f3875ee4352603afa
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/22363
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel')
-rw-r--r-- | src/soc/intel/apollolake/spi.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/spi.c b/src/soc/intel/apollolake/spi.c index 9a651ee0482f..fecb0cfd26b8 100644 --- a/src/soc/intel/apollolake/spi.c +++ b/src/soc/intel/apollolake/spi.c @@ -16,8 +16,36 @@ #include <console/console.h> #include <intelblocks/fast_spi.h> +#include <intelblocks/spi.h> +#include <soc/pci_devs.h> #include <spi-generic.h> +int spi_soc_devfn_to_bus(unsigned int devfn) +{ + switch (devfn) { + case PCH_DEVFN_SPI0: + return 0; + case PCH_DEVFN_SPI1: + return 1; + case PCH_DEVFN_SPI2: + return 2; + } + return -1; +} + +int spi_soc_bus_to_devfn(unsigned int bus) +{ + switch (bus) { + case 0: + return PCH_DEVFN_SPI0; + case 1: + return PCH_DEVFN_SPI1; + case 2: + return PCH_DEVFN_SPI2; + } + return -1; +} + const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { { .ctrlr = &fast_spi_flash_ctrlr, .bus_start = 0, .bus_end = 0 }, }; |