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authorYidi Lin <yidi.lin@mediatek.com>2016-02-16 20:42:10 +0800
committerPatrick Georgi <pgeorgi@google.com>2016-03-12 09:14:58 +0100
commit0bdfec85789f56167757a17a8dd18ca7418a51b3 (patch)
tree44df22a249ba735996b72d085cabe6d33c0b3ae8 /src/soc/mediatek/mt8173/mmu_operations.c
parentc6d7dcc832521ad6e5d90ad82af384ec3d24aa09 (diff)
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mediatek/mt8173: memlayout: Create DRAM DMA region for NOR flash DMA read.
NOR flash has a hardware limitation that it can't access SRAM region after 4GB mode is enabled. We add a DRAM DMA region after 0x40000000 for NOR flash driver. So that the NOR flash driver can use this region after 4GB mode is enabled. BRANCH=none BUG=chormoe-os-partner:49229 TEST=Boot to kernel on rev4 w/ 2GB ram and rev3 w/ 4GB ram. And check /proc/meminfo. Change-Id: I4a86f0028b26509589ec8d09e2d077920446ece1 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: dc61ec55187959101a9e891fe5e93928e9b8176e Original-Change-Id: Ifedc9e2dfba5d294297b3a28134997ac1dd38f94 Original-Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/327962 Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/331177 Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org> Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/13989 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8173/mmu_operations.c')
-rw-r--r--src/soc/mediatek/mt8173/mmu_operations.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8173/mmu_operations.c b/src/soc/mediatek/mt8173/mmu_operations.c
index 53152dd63116..c744d65b8e0e 100644
--- a/src/soc/mediatek/mt8173/mmu_operations.c
+++ b/src/soc/mediatek/mt8173/mmu_operations.c
@@ -53,6 +53,8 @@ void mt8173_mmu_after_dram(void)
/* TODO: Implement true unmapping, and also use it for the zero-page! */
mmu_config_range(_sram_l2c, _sram_l2c_size, DEV_MEM);
+ mmu_config_range(_dram_dma, _dram_dma_size, UNCACHED_MEM);
+
/* Careful: changing cache geometry while it's active is a bad idea! */
mmu_disable();