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| author | Tristan Shieh <tristan.shieh@mediatek.com> | 2018-07-09 18:59:32 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-07-20 13:50:54 +0000 |
| commit | 71d227b1085b5f54b11a6fcfa9419597ee5c9f56 (patch) | |
| tree | 49ba7259011ef038a6b8f9aa1808523b650115fe /src/soc/mediatek/mt8173/spi.c | |
| parent | ccb62960db3eff2d4c2905710ba99ba90f24bcdc (diff) | |
| download | coreboot-71d227b1085b5f54b11a6fcfa9419597ee5c9f56.tar.gz coreboot-71d227b1085b5f54b11a6fcfa9419597ee5c9f56.tar.bz2 coreboot-71d227b1085b5f54b11a6fcfa9419597ee5c9f56.zip | |
mediatek: Share GPIO code among similar SOCs
Refactor GPIO code which will be reused among similar SOCs.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Elm
Change-Id: Icdd1f2a1dd1bd64a7218bf9c63bd4a0af1acbcc0
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/27416
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'src/soc/mediatek/mt8173/spi.c')
| -rw-r--r-- | src/soc/mediatek/mt8173/spi.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/src/soc/mediatek/mt8173/spi.c b/src/soc/mediatek/mt8173/spi.c index f70f4d991e20..b15685a3523a 100644 --- a/src/soc/mediatek/mt8173/spi.c +++ b/src/soc/mediatek/mt8173/spi.c @@ -25,7 +25,6 @@ #include <soc/addressmap.h> #include <soc/flash_controller.h> #include <soc/gpio.h> -#include <soc/pinmux.h> #include <soc/pll.h> #include <soc/spi.h> @@ -68,10 +67,10 @@ static void mtk_spi_set_gpio_pinmux(enum spi_pad_mask pad_select) { /* TODO: implement support for other pads when needed */ assert(pad_select == SPI_PAD1_MASK); - gpio_set_mode(PAD_MSDC2_DAT2, PAD_MSDC2_DAT2_FUNC_SPI_CK_1); - gpio_set_mode(PAD_MSDC2_DAT3, PAD_MSDC2_DAT3_FUNC_SPI_MI_1); - gpio_set_mode(PAD_MSDC2_CLK, PAD_MSDC2_CLK_FUNC_SPI_MO_1); - gpio_set_mode(PAD_MSDC2_CMD, PAD_MSDC2_CMD_FUNC_SPI_CS_1); + gpio_set_mode(GPIO(MSDC2_DAT2), PAD_MSDC2_DAT2_FUNC_SPI_CK_1); + gpio_set_mode(GPIO(MSDC2_DAT3), PAD_MSDC2_DAT3_FUNC_SPI_MI_1); + gpio_set_mode(GPIO(MSDC2_CLK), PAD_MSDC2_CLK_FUNC_SPI_MO_1); + gpio_set_mode(GPIO(MSDC2_CMD), PAD_MSDC2_CMD_FUNC_SPI_CS_1); } void mtk_spi_init(unsigned int bus, unsigned int pad_select, |