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| author | Yanjie Jiang <yanjie.jiang@mediatek.com> | 2019-05-07 10:31:07 +0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-07-23 09:08:55 +0000 |
| commit | 64dea2ed622156ef02eefd20d3e64dfdbf54bcb1 (patch) | |
| tree | 3676e6ef144dee83b46baa7bc85e7a921f14802b /src/soc/mediatek/mt8183/Makefile.inc | |
| parent | cebf57905ba9d9b2850ef75758a135b18ec8e45c (diff) | |
| download | coreboot-64dea2ed622156ef02eefd20d3e64dfdbf54bcb1.tar.gz coreboot-64dea2ed622156ef02eefd20d3e64dfdbf54bcb1.tar.bz2 coreboot-64dea2ed622156ef02eefd20d3e64dfdbf54bcb1.zip | |
mediatek/mt8183: Add md power-off flow
SRCCLKENA holds 26M clock, which will fail suspend/resume,
and the SRCCLKENA is not used by mt8183,
so we can simply release it for suspend/resume to work.
BUG=b:80501386
BRANCH=none
Test=Boots correctly on Kukui, suspend test pass.
Change-Id: Ib6e11faeb6936a1dd6bbe8b1a8b612446bf51082
Signed-off-by: Yanjie.jiang <yanjie.jiang@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32666
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8183/Makefile.inc')
| -rw-r--r-- | src/soc/mediatek/mt8183/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/Makefile.inc b/src/soc/mediatek/mt8183/Makefile.inc index 0a79ed7b98f2..edf71a89f30d 100644 --- a/src/soc/mediatek/mt8183/Makefile.inc +++ b/src/soc/mediatek/mt8183/Makefile.inc @@ -54,6 +54,7 @@ ramstage-y += ../common/timer.c ramstage-y += ../common/uart.c ramstage-y += ../common/usb.c ramstage-y += ../common/wdt.c +ramstage-y += md_ctrl.c CPPFLAGS_common += -Isrc/soc/mediatek/mt8183/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include |