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| author | Weiyi Lu <weiyi.lu@mediatek.com> | 2020-04-09 11:59:50 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2020-09-16 07:48:20 +0000 |
| commit | 0fed84b8c42dcfc76cbc9fbdd1fa53b3c4ae62d1 (patch) | |
| tree | 50e3bfd3f462cca139f379e6dbba5be174d8865d /src/soc/mediatek/mt8183 | |
| parent | d121a117ccf8727623eef32337d70c8f802c623c (diff) | |
| download | coreboot-0fed84b8c42dcfc76cbc9fbdd1fa53b3c4ae62d1.tar.gz coreboot-0fed84b8c42dcfc76cbc9fbdd1fa53b3c4ae62d1.tar.bz2 coreboot-0fed84b8c42dcfc76cbc9fbdd1fa53b3c4ae62d1.zip | |
soc/mediatek: move power status bits under each chip
The power status bits of display and audio of MT8192 are different
from the bits of MT8173 & MT8183, so move those under each chip.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Change-Id: Iaa211b8db733d8aa52d93af9e507042bf0984d55
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45393
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8183')
| -rw-r--r-- | src/soc/mediatek/mt8183/include/soc/spm.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8183/include/soc/spm.h b/src/soc/mediatek/mt8183/include/soc/spm.h index fa6d6d00cee2..327355ae053f 100644 --- a/src/soc/mediatek/mt8183/include/soc/spm.h +++ b/src/soc/mediatek/mt8183/include/soc/spm.h @@ -117,8 +117,10 @@ #define PCM_SW_INT_ALL (0x3FF) enum { + DISP_PWR_STA_MASK = 0x1 << 3, DISP_SRAM_PDN_MASK = 0x1 << 8, DISP_SRAM_ACK_MASK = 0x1 << 12, + AUDIO_PWR_STA_MASK = 0x1 << 24, AUDIO_SRAM_PDN_MASK = 0xf << 8, AUDIO_SRAM_ACK_MASK = 0xf << 12, }; |