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| author | BryantOu <Bryant.Ou.Q@gmail.com> | 2020-04-17 01:41:35 -0700 |
|---|---|---|
| committer | Andrey Petrov <andrey.petrov@gmail.com> | 2020-04-30 17:45:50 +0000 |
| commit | 4e06c6eeb1179cf553c99eff6f2ae9888376fd67 (patch) | |
| tree | ebce139936ccc98665dc2953f0ba2092709f3fa0 /src/soc/mediatek/mt8183 | |
| parent | b8bfe142c6bbaf3674e9d0ff70b42ca32bcb4df4 (diff) | |
| download | coreboot-4e06c6eeb1179cf553c99eff6f2ae9888376fd67.tar.gz coreboot-4e06c6eeb1179cf553c99eff6f2ae9888376fd67.tar.bz2 coreboot-4e06c6eeb1179cf553c99eff6f2ae9888376fd67.zip | |
mb/ocp/tiogapass: Implement port 80h direct to GPIO and init UART pins
Enable aspeed's function that port 80h direct to GPIO for LED display,
refer to section 9.4 Port 80h Direct to GPIO Guide of aspeed's
Application Design Guide, also configure GPIO to UART for output
serial console messages.
Tested=Check if port 80h LED debug card can display POST codes at
early stage, and serial console can see the related messages.
Change-Id: I087d5a81b881533b4550c193e4e9720a134fb8e7
Signed-off-by: BryantOu <Bryant.Ou.Q@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40481
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Andrey Petrov <andrey.petrov@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/mediatek/mt8183')
0 files changed, 0 insertions, 0 deletions