summaryrefslogtreecommitdiffstats
path: root/src/soc/mediatek/mt8186/include/soc
diff options
context:
space:
mode:
authorRex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>2021-10-13 20:08:26 +0800
committerHung-Te Lin <hungte@chromium.org>2021-11-15 03:07:15 +0000
commit2f9e5b9e34d5812047725b4aebf612848e8f507e (patch)
tree046b81680234a9152f10315cb4bcd69be0694030 /src/soc/mediatek/mt8186/include/soc
parentea0b13205af6194d28babcd8e0c30f91c1550012 (diff)
downloadcoreboot-2f9e5b9e34d5812047725b4aebf612848e8f507e.tar.gz
coreboot-2f9e5b9e34d5812047725b4aebf612848e8f507e.tar.bz2
coreboot-2f9e5b9e34d5812047725b4aebf612848e8f507e.zip
soc/mediatek/mt8186: add USB support
1. Enable and setup USB drivers. 2. Pull up to a weak resistor for USB3_HUB_RST_L and we reset the hub via GPIO149. TEST=boot kernel from USB ok BUG=b:202871018 Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com> Change-Id: Ifcc11d51b0c1e495477957111e6021ef8275f629 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59251 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/mt8186/include/soc')
-rw-r--r--src/soc/mediatek/mt8186/include/soc/addressmap.h6
-rw-r--r--src/soc/mediatek/mt8186/include/soc/usb.h29
2 files changed, 33 insertions, 2 deletions
diff --git a/src/soc/mediatek/mt8186/include/soc/addressmap.h b/src/soc/mediatek/mt8186/include/soc/addressmap.h
index 28ba3694740b..cabafb62b3cd 100644
--- a/src/soc/mediatek/mt8186/include/soc/addressmap.h
+++ b/src/soc/mediatek/mt8186/include/soc/addressmap.h
@@ -64,9 +64,11 @@ enum {
SPI5_BASE = IO_PHYS + 0x01015000,
I2C5_BASE = IO_PHYS + 0x01016000,
I2C9_BASE = IO_PHYS + 0x01019000,
- SSUSB_IPPC_BASE = IO_PHYS + 0x01203E00,
+ /* Corsola uses USB2 port1 instead of USB2 port0. */
+ SSUSB_IPPC_BASE = IO_PHYS + 0x01283E00,
MSDC0_BASE = IO_PHYS + 0x01230000,
- SSUSB_SIF_BASE = IO_PHYS + 0x01CA0000,
+ /* Corsola uses USB2 port1 instead of USB2 port0. */
+ SSUSB_SIF_BASE = IO_PHYS + 0x01C80300,
EFUSEC_BASE = IO_PHYS + 0x01CB0000,
MIPITX_BASE = IO_PHYS + 0x01CC0000,
MSDC0_TOP_BASE = IO_PHYS + 0x01CD0000,
diff --git a/src/soc/mediatek/mt8186/include/soc/usb.h b/src/soc/mediatek/mt8186/include/soc/usb.h
new file mode 100644
index 000000000000..297c8f186d1b
--- /dev/null
+++ b/src/soc/mediatek/mt8186/include/soc/usb.h
@@ -0,0 +1,29 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/*
+ * This file is created based on MT8186 Functional Specification
+ * Chapter number: 5.5
+ */
+
+#ifndef SOC_MEDIATEK_MT8186_USB_H
+#define SOC_MEDIATEK_MT8186_USB_H
+
+#include <soc/usb_common.h>
+
+struct ssusb_sif_port {
+ struct sif_u2_phy_com u2phy;
+ u32 reserved0[64 * 5];
+ struct sif_u3phyd u3phyd;
+ u32 reserved1[64];
+ struct sif_u3phya u3phya;
+ struct sif_u3phya_da u3phya_da;
+ u32 reserved2[64 * 3];
+};
+check_member(ssusb_sif_port, u3phyd, 0x600);
+check_member(ssusb_sif_port, u3phya, 0x800);
+check_member(ssusb_sif_port, u3phya_da, 0x900);
+check_member(ssusb_sif_port, reserved2, 0xa00);
+
+#define USB_PORT_NUMBER 1
+
+#endif