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| author | Liju-Clr Chen <liju-clr.chen@mediatek.com> | 2022-11-01 10:35:33 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-11-04 13:19:52 +0000 |
| commit | 5ab991d0ab285ee778ebc3d64875bb73e8c4c78b (patch) | |
| tree | 448b94c5b6029dccde1d44b8cd8ec49139737bba /src/soc/mediatek/mt8188 | |
| parent | 78b7fb2c17a697e7511a48a271402839f51e7800 (diff) | |
| download | coreboot-5ab991d0ab285ee778ebc3d64875bb73e8c4c78b.tar.gz coreboot-5ab991d0ab285ee778ebc3d64875bb73e8c4c78b.tar.bz2 coreboot-5ab991d0ab285ee778ebc3d64875bb73e8c4c78b.zip | |
soc/mediatek/mt8188: Disable input-gating for big-core SRAM
The input-gating is an experimental feature (but unfortunately default
enabled) and would lead to crash on MT8188, so we have to disable it
in the firmware stage.
BUG=b:233720142
TEST=CPUfreq in kernel test pass.
Change-Id: Ifd68fe9362587955cdb8598c4cc5c2d0eefe53ca
Signed-off-by: Liju-Clr Chen <liju-clr.chen@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69089
Reviewed-by: Yidi Lin <yidilin@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/mediatek/mt8188')
| -rw-r--r-- | src/soc/mediatek/mt8188/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8188/cpu_input_gating.c | 15 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8188/include/soc/cpu_input_gating.h | 8 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8188/soc.c | 4 |
4 files changed, 28 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8188/Makefile.inc b/src/soc/mediatek/mt8188/Makefile.inc index fc56eb3f4a8f..52fc8612e775 100644 --- a/src/soc/mediatek/mt8188/Makefile.inc +++ b/src/soc/mediatek/mt8188/Makefile.inc @@ -31,6 +31,7 @@ romstage-y += ../common/rtc.c ../common/rtc_osc_init.c ../common/rtc_mt6359p.c ramstage-y += ../common/auxadc.c ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c +ramstage-y += cpu_input_gating.c ramstage-y += ../common/ddp.c ddp.c ramstage-y += ../common/devapc.c devapc.c ramstage-y += ../common/dfd.c diff --git a/src/soc/mediatek/mt8188/cpu_input_gating.c b/src/soc/mediatek/mt8188/cpu_input_gating.c new file mode 100644 index 000000000000..10f6338d357b --- /dev/null +++ b/src/soc/mediatek/mt8188/cpu_input_gating.c @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include <device/mmio.h> +#include <soc/addressmap.h> +#include <soc/cpu_input_gating.h> + +#define CPU6_IG_EN_REG (MCUSYS_BASE + 0x3308) +#define CPU7_IG_EN_REG (MCUSYS_BASE + 0x3b08) +#define DISABLE_CPU_IG 0xfc000001 + +void disable_cpu_input_gating(void) +{ + write32p(CPU6_IG_EN_REG, DISABLE_CPU_IG); + write32p(CPU7_IG_EN_REG, DISABLE_CPU_IG); +} diff --git a/src/soc/mediatek/mt8188/include/soc/cpu_input_gating.h b/src/soc/mediatek/mt8188/include/soc/cpu_input_gating.h new file mode 100644 index 000000000000..fe07457d4620 --- /dev/null +++ b/src/soc/mediatek/mt8188/include/soc/cpu_input_gating.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#ifndef SOC_MEDIATEK_MT8188_CPU_INPUT_GATING_H +#define SOC_MEDIATEK_MT8188_CPU_INPUT_GATING_H + +void disable_cpu_input_gating(void); + +#endif /* SOC_MEDIATEK_MT8188_CPU_INPUT_GATING_H */ diff --git a/src/soc/mediatek/mt8188/soc.c b/src/soc/mediatek/mt8188/soc.c index bcbea03c8957..c63b5ca3449e 100644 --- a/src/soc/mediatek/mt8188/soc.c +++ b/src/soc/mediatek/mt8188/soc.c @@ -3,6 +3,7 @@ #include <bootmem.h> #include <console/console.h> #include <device/device.h> +#include <soc/cpu_input_gating.h> #include <soc/devapc.h> #include <soc/dfd.h> #include <soc/dpm.h> @@ -27,6 +28,9 @@ static void soc_read_resources(struct device *dev) static void soc_init(struct device *dev) { mtk_mmu_disable_l2c_sram(); + + disable_cpu_input_gating(); + dapc_init(); mcupm_init(); sspm_init(); |